[SCSI] bfa: Brocade-1860 Fabric Adapter Hardware Enablement
- Added support for Brocade-1860 Fabric Adapter. - Made changes to support single firmware image per asic type. - Combined bfi_cbreg.h and bfi_ctreg.h defines into bfi_reg.h with only minimal defines used by host. - Added changes to setup CPE/RME Queue register offsets based on firmware response. - Removed queue register offset initializations and added register offsets to BFI config response message. - Added Brocade-1860 asic specific interrupt status definitions and mailbox interfaces. Signed-off-by: Krishna Gudipati <kgudipat@brocade.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This commit is contained in:

committed by
James Bottomley

vanhempi
43ffdf4dfb
commit
111892082e
@@ -17,7 +17,7 @@
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#include "bfad_drv.h"
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#include "bfa_ioc.h"
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#include "bfi_cbreg.h"
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#include "bfi_reg.h"
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#include "bfa_defs.h"
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BFA_TRC_FILE(CNA, IOC_CB);
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@@ -77,7 +77,7 @@ bfa_ioc_cb_firmware_lock(struct bfa_ioc_s *ioc)
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bfa_ioc_fwver_get(ioc, &fwhdr);
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if (swab32(fwhdr.exec) == BFI_BOOT_TYPE_NORMAL)
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if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL)
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return BFA_TRUE;
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bfa_trc(ioc, fwstate);
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@@ -98,7 +98,7 @@ bfa_ioc_cb_firmware_unlock(struct bfa_ioc_s *ioc)
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static void
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bfa_ioc_cb_notify_fail(struct bfa_ioc_s *ioc)
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{
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writel(__PSS_ERR_STATUS_SET, ioc->ioc_regs.err_set);
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writel(~0U, ioc->ioc_regs.err_set);
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readl(ioc->ioc_regs.err_set);
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}
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@@ -152,8 +152,8 @@ bfa_ioc_cb_reg_init(struct bfa_ioc_s *ioc)
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*/
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ioc->ioc_regs.pss_ctl_reg = (rb + PSS_CTL_REG);
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ioc->ioc_regs.pss_err_status_reg = (rb + PSS_ERR_STATUS_REG);
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ioc->ioc_regs.app_pll_fast_ctl_reg = (rb + APP_PLL_400_CTL_REG);
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ioc->ioc_regs.app_pll_slow_ctl_reg = (rb + APP_PLL_212_CTL_REG);
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ioc->ioc_regs.app_pll_fast_ctl_reg = (rb + APP_PLL_LCLK_CTL_REG);
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ioc->ioc_regs.app_pll_slow_ctl_reg = (rb + APP_PLL_SCLK_CTL_REG);
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/*
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* IOC semaphore registers and serialization
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@@ -285,18 +285,18 @@ bfa_ioc_cb_sync_complete(struct bfa_ioc_s *ioc)
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}
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bfa_status_t
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bfa_ioc_cb_pll_init(void __iomem *rb, bfa_boolean_t fcmode)
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bfa_ioc_cb_pll_init(void __iomem *rb, enum bfi_asic_mode fcmode)
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{
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u32 pll_sclk, pll_fclk;
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pll_sclk = __APP_PLL_212_ENABLE | __APP_PLL_212_LRESETN |
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__APP_PLL_212_P0_1(3U) |
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__APP_PLL_212_JITLMT0_1(3U) |
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__APP_PLL_212_CNTLMT0_1(3U);
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pll_fclk = __APP_PLL_400_ENABLE | __APP_PLL_400_LRESETN |
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__APP_PLL_400_RSEL200500 | __APP_PLL_400_P0_1(3U) |
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__APP_PLL_400_JITLMT0_1(3U) |
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__APP_PLL_400_CNTLMT0_1(3U);
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pll_sclk = __APP_PLL_SCLK_ENABLE | __APP_PLL_SCLK_LRESETN |
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__APP_PLL_SCLK_P0_1(3U) |
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__APP_PLL_SCLK_JITLMT0_1(3U) |
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__APP_PLL_SCLK_CNTLMT0_1(3U);
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pll_fclk = __APP_PLL_LCLK_ENABLE | __APP_PLL_LCLK_LRESETN |
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__APP_PLL_LCLK_RSEL200500 | __APP_PLL_LCLK_P0_1(3U) |
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__APP_PLL_LCLK_JITLMT0_1(3U) |
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__APP_PLL_LCLK_CNTLMT0_1(3U);
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writel(BFI_IOC_UNINIT, (rb + BFA_IOC0_STATE_REG));
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writel(BFI_IOC_UNINIT, (rb + BFA_IOC1_STATE_REG));
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writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
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@@ -305,24 +305,24 @@ bfa_ioc_cb_pll_init(void __iomem *rb, bfa_boolean_t fcmode)
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writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
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writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
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writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
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writel(__APP_PLL_212_LOGIC_SOFT_RESET, rb + APP_PLL_212_CTL_REG);
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writel(__APP_PLL_212_BYPASS | __APP_PLL_212_LOGIC_SOFT_RESET,
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rb + APP_PLL_212_CTL_REG);
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writel(__APP_PLL_400_LOGIC_SOFT_RESET, rb + APP_PLL_400_CTL_REG);
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writel(__APP_PLL_400_BYPASS | __APP_PLL_400_LOGIC_SOFT_RESET,
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rb + APP_PLL_400_CTL_REG);
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writel(__APP_PLL_SCLK_LOGIC_SOFT_RESET, rb + APP_PLL_SCLK_CTL_REG);
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writel(__APP_PLL_SCLK_BYPASS | __APP_PLL_SCLK_LOGIC_SOFT_RESET,
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rb + APP_PLL_SCLK_CTL_REG);
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writel(__APP_PLL_LCLK_LOGIC_SOFT_RESET, rb + APP_PLL_LCLK_CTL_REG);
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writel(__APP_PLL_LCLK_BYPASS | __APP_PLL_LCLK_LOGIC_SOFT_RESET,
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rb + APP_PLL_LCLK_CTL_REG);
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udelay(2);
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writel(__APP_PLL_212_LOGIC_SOFT_RESET, rb + APP_PLL_212_CTL_REG);
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writel(__APP_PLL_400_LOGIC_SOFT_RESET, rb + APP_PLL_400_CTL_REG);
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writel(pll_sclk | __APP_PLL_212_LOGIC_SOFT_RESET,
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rb + APP_PLL_212_CTL_REG);
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writel(pll_fclk | __APP_PLL_400_LOGIC_SOFT_RESET,
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rb + APP_PLL_400_CTL_REG);
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writel(__APP_PLL_SCLK_LOGIC_SOFT_RESET, rb + APP_PLL_SCLK_CTL_REG);
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writel(__APP_PLL_LCLK_LOGIC_SOFT_RESET, rb + APP_PLL_LCLK_CTL_REG);
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writel(pll_sclk | __APP_PLL_SCLK_LOGIC_SOFT_RESET,
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rb + APP_PLL_SCLK_CTL_REG);
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writel(pll_fclk | __APP_PLL_LCLK_LOGIC_SOFT_RESET,
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rb + APP_PLL_LCLK_CTL_REG);
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udelay(2000);
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writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
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writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
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writel(pll_sclk, (rb + APP_PLL_212_CTL_REG));
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writel(pll_fclk, (rb + APP_PLL_400_CTL_REG));
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writel(pll_sclk, (rb + APP_PLL_SCLK_CTL_REG));
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writel(pll_fclk, (rb + APP_PLL_LCLK_CTL_REG));
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return BFA_STATUS_OK;
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}
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