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ARM/orion/time: Migrate to new 'set-state' interface

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Migrate orion driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
This commit is contained in:
Viresh Kumar
2015-02-27 13:39:52 +05:30
parent 8d778377e5
commit 10dca88a4b
1 changed files with 44 additions and 41 deletions
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85
arch/arm/plat-orion/time.c
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@@ -106,60 +106,63 @@ orion_clkevt_next_event(unsigned long delta, struct clock_event_device *dev)
return 0; return 0;
} }
static void static int orion_clkevt_shutdown(struct clock_event_device *evt)
orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
{ {
unsigned long flags; unsigned long flags;
u32 u; u32 u;
local_irq_save(flags); local_irq_save(flags);
if (mode == CLOCK_EVT_MODE_PERIODIC) {
/*
* Setup timer to fire at 1/HZ intervals.
*/
writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
/* /* Disable timer */
* Enable timer interrupt. u = readl(timer_base + TIMER_CTRL_OFF);
*/ writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF);
u = readl(bridge_base + BRIDGE_MASK_OFF);
writel(u | BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
/* /* Disable timer interrupt */
* Enable timer. u = readl(bridge_base + BRIDGE_MASK_OFF);
*/ writel(u & ~BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
u = readl(timer_base + TIMER_CTRL_OFF);
writel(u | TIMER1_EN | TIMER1_RELOAD_EN,
timer_base + TIMER_CTRL_OFF);
} else {
/*
* Disable timer.
*/
u = readl(timer_base + TIMER_CTRL_OFF);
writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF);
/* /* ACK pending timer interrupt */
* Disable timer interrupt. writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
*/
u = readl(bridge_base + BRIDGE_MASK_OFF);
writel(u & ~BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
/*
* ACK pending timer interrupt.
*/
writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
}
local_irq_restore(flags); local_irq_restore(flags);
return 0;
}
static int orion_clkevt_set_periodic(struct clock_event_device *evt)
{
unsigned long flags;
u32 u;
local_irq_save(flags);
/* Setup timer to fire at 1/HZ intervals */
writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
/* Enable timer interrupt */
u = readl(bridge_base + BRIDGE_MASK_OFF);
writel(u | BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
/* Enable timer */
u = readl(timer_base + TIMER_CTRL_OFF);
writel(u | TIMER1_EN | TIMER1_RELOAD_EN, timer_base + TIMER_CTRL_OFF);
local_irq_restore(flags);
return 0;
} }
static struct clock_event_device orion_clkevt = { static struct clock_event_device orion_clkevt = {
.name = "orion_tick", .name = "orion_tick",
.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, .features = CLOCK_EVT_FEAT_ONESHOT |
.rating = 300, CLOCK_EVT_FEAT_PERIODIC,
.set_next_event = orion_clkevt_next_event, .rating = 300,
.set_mode = orion_clkevt_mode, .set_next_event = orion_clkevt_next_event,
.set_state_shutdown = orion_clkevt_shutdown,
.set_state_periodic = orion_clkevt_set_periodic,
.set_state_oneshot = orion_clkevt_shutdown,
.tick_resume = orion_clkevt_shutdown,
}; };
static irqreturn_t orion_timer_interrupt(int irq, void *dev_id) static irqreturn_t orion_timer_interrupt(int irq, void *dev_id)