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MIPS: SGI-IP27: fix readb/writeb addressing

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Our chosen byte swapping, which is what firmware already uses, is to
do readl/writel by normal lw/sw intructions (data invariance). This
also means we need to mangle addresses for u8 and u16 accesses. The
mangling for 16bit has been done aready, but 8bit one was missing.
Correcting this causes different addresses for accesses to the
SuperIO and local bus of the IOC3 chip. This is fixed by changing
byte order in ioc3 and m48rtc_rtc structs.

Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: David S. Miller <davem@davemloft.net>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: netdev@vger.kernel.org
Cc: linux-rtc@vger.kernel.org
This commit is contained in:
Thomas Bogendoerfer
2020-01-09 11:34:28 +01:00
committed by Paul Burton
parent 2634e5a651
commit 10cf8300ec
4 changed files with 44 additions and 21 deletions
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12
drivers/net/ethernet/sgi/ioc3-eth.c
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@@ -1079,6 +1079,16 @@ static int ioc3_is_menet(struct pci_dev *pdev)
* Can't use UPF_IOREMAP as the whole of IOC3 resources have already been
* registered.
*/
static unsigned int ioc3_serial_in(struct uart_port *p, int offset)
{
return readb(p->membase + (offset ^ 3));
}
static void ioc3_serial_out(struct uart_port *p, int offset, int value)
{
writeb(value, p->membase + (offset ^ 3));
}
static void ioc3_8250_register(struct ioc3_uartregs __iomem *uart)
{
#define COSMISC_CONSTANT 6
@@ -1093,6 +1103,8 @@ static void ioc3_8250_register(struct ioc3_uartregs __iomem *uart)
.membase = (unsigned char __iomem *)uart,
.mapbase = (unsigned long)uart,
.serial_in = ioc3_serial_in,
.serial_out = ioc3_serial_out,
}
};
unsigned char lcr;