clk: tegra: Fix cdev1 and cdev2 IDs

Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
这个提交包含在:
Prashant Gaikwad
2013-04-04 14:35:04 +05:30
提交者 Stephen Warren
父节点 a44a019d45
当前提交 1071b2df22
修改 11 个文件,包含 11 行新增11 行删除

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@@ -53,7 +53,7 @@
nvidia,spkr-en-gpios = <&wm8903 2 0>;
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};