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clk: tegra: Fix cdev1 and cdev2 IDs

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Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Prashant Gaikwad
2013-04-04 14:35:04 +05:30
committed by Stephen Warren
parent a44a019d45
commit 1071b2df22
11 changed files with 11 additions and 11 deletions
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2
arch/arm/boot/dts/tegra20-seaboard.dts
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@@ -830,7 +830,7 @@
nvidia,spkr-en-gpios = <&wm8903 2 0>;
nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};