drm/radeon: implement tn_set_vce_clocks
This implements the function to set the vce clocks on TN hardware. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -46,6 +46,13 @@
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#define DMIF_ADDR_CONFIG 0xBD4
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/* fusion vce clocks */
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#define CG_ECLK_CNTL 0x620
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# define ECLK_DIVIDER_MASK 0x7f
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# define ECLK_DIR_CNTL_EN (1 << 8)
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#define CG_ECLK_STATUS 0x624
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# define ECLK_STATUS (1 << 0)
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/* DCE6 only */
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#define DMIF_ADDR_CALC 0xC00
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