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Merge tag 'for-linus-20140127' of git://git.infradead.org/linux-mtd

Browse Source 
Pull MTD updates from Brian Norris:
 - Add me (Brian Norris) as an additional MTD maintainer (it'd be nice to get
   David's "ack" for this; I'm sure he approves, but he's been pretty silent
   lately)
 - Add Ezequiel Garcie as maintainer for the pxa3xx NAND driver
 - Last (?) round of pxa3xx improvements for supporting Armada 370/XP
 - Typical churn in driver boilerplate (OOM messages, printk()'s, devm_*, etc.)
 - Quad read mode support for SPI NOR driver (m25p80)
 - Update Davinci NAND driver to prepare for use on new platforms
 - Begin to kill off NAND_MAX_{PAGE,OOB}SIZE macros; more work is pending
 - Miscellaneous NAND device support (new IDs)
 - Add READ RETRY support for Micron MLC NAND
 - Support new GPMI NAND ECC layout device-tree binding
 - Avoid mapping stack/vmalloc() memory for GPMI NAND DMA

* tag 'for-linus-20140127' of git://git.infradead.org/linux-mtd: (151 commits)
  mtd: gpmi: add sanity check when mapping DMA for read_buf/write_buf
  mtd: gpmi: allocate a proper buffer for non ECC read/write
  mtd: m25p80: Set rx_nbits for Quad SPI transfers
  mtd: m25p80: Enable Quad SPI read transfers for s25fl512s
  mtd: s3c2410: Merge plat/regs-nand.h into s3c2410.c
  mtd: mtdram: add missing 'const'
  mtd: m25p80: assign default read command
  mtd: nuc900_nand: remove redundant return value check of platform_get_resource()
  mtd: plat_nand: remove redundant return value check of platform_get_resource()
  mtd: nand: add Intel manufacturer ID
  mtd: nand: add SanDisk manufacturer ID
  mtd: nand: add support for Samsung K9LCG08U0B
  mtd: nand: pxa3xx: Add support for 2048 bytes page size devices
  mtd: m25p80: Use OPCODE_QUAD_READ_4B for 4-byte addressing
  mtd: nand: don't use {read,write}_buf for 8-bit transfers
  mtd: nand: use __packed shorthand
  mtd: nand: support Micron READ RETRY
  mtd: nand: add generic READ RETRY support
  mtd: nand: add ONFI vendor block for Micron
  mtd: nand: localize ECC failures per page
  ...
This commit is contained in:
Linus Torvalds
2014-01-28 18:56:37 -08:00
parent 268943fb75 0ff76a920e
commit 0e47c969c6
76 changed files with 1699 additions and 1054 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
include/linux/mtd/mtdram.h
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@@ -3,6 +3,6 @@
#include <linux/mtd/mtd.h>
int mtdram_init_device(struct mtd_info *mtd, void *mapped_address,
unsigned long size, char *name);
unsigned long size, const char *name);
#endif /* __MTD_MTDRAM_H__ */

41
include/linux/mtd/nand.h
View File

@@ -219,6 +219,9 @@ struct nand_chip;
/* ONFI feature address */
#define ONFI_FEATURE_ADDR_TIMING_MODE 0x1
/* Vendor-specific feature address (Micron) */
#define ONFI_FEATURE_ADDR_READ_RETRY 0x89
/* ONFI subfeature parameters length */
#define ONFI_SUBFEATURE_PARAM_LEN 4
@@ -279,16 +282,17 @@ struct nand_onfi_params {
__le16 io_pin_capacitance_typ;
__le16 input_pin_capacitance_typ;
u8 input_pin_capacitance_max;
u8 driver_strenght_support;
u8 driver_strength_support;
__le16 t_int_r;
__le16 t_ald;
u8 reserved4[7];
/* vendor */
u8 reserved5[90];
__le16 vendor_revision;
u8 vendor[88];
__le16 crc;
} __attribute__((packed));
} __packed;
#define ONFI_CRC_BASE 0x4F4E
@@ -326,6 +330,26 @@ struct onfi_ext_param_page {
*/
} __packed;
struct nand_onfi_vendor_micron {
u8 two_plane_read;
u8 read_cache;
u8 read_unique_id;
u8 dq_imped;
u8 dq_imped_num_settings;
u8 dq_imped_feat_addr;
u8 rb_pulldown_strength;
u8 rb_pulldown_strength_feat_addr;
u8 rb_pulldown_strength_num_settings;
u8 otp_mode;
u8 otp_page_start;
u8 otp_data_prot_addr;
u8 otp_num_pages;
u8 otp_feat_addr;
u8 read_retry_options;
u8 reserved[72];
u8 param_revision;
} __packed;
/**
* struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
* @lock: protection lock
@@ -432,6 +456,8 @@ struct nand_buffers {
* flash device.
* @read_byte: [REPLACEABLE] read one byte from the chip
* @read_word: [REPLACEABLE] read one word from the chip
* @write_byte: [REPLACEABLE] write a single byte to the chip on the
* low 8 I/O lines
* @write_buf: [REPLACEABLE] write data from the buffer to the chip
* @read_buf: [REPLACEABLE] read data from the chip into the buffer
* @select_chip: [REPLACEABLE] select chip nr
@@ -451,6 +477,8 @@ struct nand_buffers {
* commands to the chip.
* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on
* ready.
* @setup_read_retry: [FLASHSPECIFIC] flash (vendor) specific function for
* setting the read-retry mode. Mostly needed for MLC NAND.
* @ecc: [BOARDSPECIFIC] ECC control structure
* @buffers: buffer structure for read/write
* @hwcontrol: platform-specific hardware control structure
@@ -497,6 +525,7 @@ struct nand_buffers {
* non 0 if ONFI supported.
* @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
* supported, 0 otherwise.
* @read_retries: [INTERN] the number of read retry modes supported
* @onfi_set_features: [REPLACEABLE] set the features for ONFI nand
* @onfi_get_features: [REPLACEABLE] get the features for ONFI nand
* @bbt: [INTERN] bad block table pointer
@@ -521,6 +550,7 @@ struct nand_chip {
uint8_t (*read_byte)(struct mtd_info *mtd);
u16 (*read_word)(struct mtd_info *mtd);
void (*write_byte)(struct mtd_info *mtd, uint8_t byte);
void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
void (*select_chip)(struct mtd_info *mtd, int chip);
@@ -544,6 +574,7 @@ struct nand_chip {
int feature_addr, uint8_t *subfeature_para);
int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
int feature_addr, uint8_t *subfeature_para);
int (*setup_read_retry)(struct mtd_info *mtd, int retry_mode);
int chip_delay;
unsigned int options;
@@ -568,6 +599,8 @@ struct nand_chip {
int onfi_version;
struct nand_onfi_params onfi_params;
int read_retries;
flstate_t state;
uint8_t *oob_poi;
@@ -600,6 +633,8 @@ struct nand_chip {
#define NAND_MFR_AMD 0x01
#define NAND_MFR_MACRONIX 0xc2
#define NAND_MFR_EON 0x92
#define NAND_MFR_SANDISK 0x45
#define NAND_MFR_INTEL 0x89
/* The maximum expected count of bytes in the NAND ID sequence */
#define NAND_MAX_ID_LEN 8

8
include/linux/mtd/partitions.h
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@@ -37,7 +37,7 @@
*/
struct mtd_partition {
char *name; /* identifier string */
const char *name; /* identifier string */
uint64_t size; /* partition size */
uint64_t offset; /* offset within the master MTD space */
uint32_t mask_flags; /* master MTD flags to mask out for this partition */
@@ -76,11 +76,11 @@ struct mtd_part_parser {
struct mtd_part_parser_data *);
};
extern int register_mtd_parser(struct mtd_part_parser *parser);
extern int deregister_mtd_parser(struct mtd_part_parser *parser);
extern void register_mtd_parser(struct mtd_part_parser *parser);
extern void deregister_mtd_parser(struct mtd_part_parser *parser);
int mtd_is_partition(const struct mtd_info *mtd);
int mtd_add_partition(struct mtd_info *master, char *name,
int mtd_add_partition(struct mtd_info *master, const char *name,
long long offset, long long length);
int mtd_del_partition(struct mtd_info *master, int partno);
uint64_t mtd_get_device_size(const struct mtd_info *mtd);

2
include/linux/of_mtd.h
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@@ -7,7 +7,7 @@
*/
#ifndef __LINUX_OF_MTD_H
#define __LINUX_OF_NET_H
#define __LINUX_OF_MTD_H
#ifdef CONFIG_OF_MTD

2
include/linux/platform_data/mtd-nand-omap2.h
View File

@@ -1,6 +1,4 @@
/*
* arch/arm/plat-omap/include/mach/nand.h
*
* Copyright (C) 2006 Micron Technology Inc.
*
* This program is free software; you can redistribute it and/or modify

3
include/linux/platform_data/mtd-nand-pxa3xx.h
View File

@@ -55,6 +55,9 @@ struct pxa3xx_nand_platform_data {
/* indicate how many chip selects will be used */
int num_cs;
/* use an flash-based bad block table */
bool flash_bbt;
const struct mtd_partition *parts[NUM_CHIP_SELECT];
unsigned int nr_parts[NUM_CHIP_SELECT];

2
include/linux/platform_data/mtd-onenand-omap2.h
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@@ -1,6 +1,4 @@
/*
* arch/arm/plat-omap/include/mach/onenand.h
*
* Copyright (C) 2006 Nokia Corporation
* Author: Juha Yrjola
*

6
include/linux/platform_data/mtd-orion_nand.h
View File

@@ -1,13 +1,11 @@
/*
* arch/arm/plat-orion/include/plat/orion_nand.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __PLAT_ORION_NAND_H
#define __PLAT_ORION_NAND_H
#ifndef __MTD_ORION_NAND_H
#define __MTD_ORION_NAND_H
/*
* Device bus NAND private data