KVM: x86: MMU: always set accessed bit in shadow PTEs
Commit7a1638ce42
("nEPT: Redefine EPT-specific link_shadow_page()", 2013-08-05) says: Since nEPT doesn't support A/D bit, we should not set those bit when building the shadow page table. but this is not necessary. Even though nEPT doesn't support A/D bits, and hence the vmcs12 EPT pointer will never enable them, we always use them for shadow page tables if available (see construct_eptp in vmx.c). So we can set the A/D bits freely in the shadow page table. This patch hence basically reverts commit7a1638ce42
. Cc: Yang Zhang <yang.z.zhang@Intel.com> Cc: Takuya Yoshikawa <yoshikawa_takuya_b1@lab.ntt.co.jp> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@@ -2198,7 +2198,7 @@ static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
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return __shadow_walk_next(iterator, *iterator->sptep);
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}
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static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp, bool accessed)
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static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
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{
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u64 spte;
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@@ -2206,10 +2206,7 @@ static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp, bool accessed)
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VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
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spte = __pa(sp->spt) | PT_PRESENT_MASK | PT_WRITABLE_MASK |
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shadow_user_mask | shadow_x_mask;
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if (accessed)
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spte |= shadow_accessed_mask;
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shadow_user_mask | shadow_x_mask | shadow_accessed_mask;
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mmu_spte_set(sptep, spte);
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}
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@@ -2740,7 +2737,7 @@ static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
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iterator.level - 1,
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1, ACC_ALL, iterator.sptep);
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link_shadow_page(iterator.sptep, sp, true);
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link_shadow_page(iterator.sptep, sp);
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}
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}
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return emulate;
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