Merge branch 'asoc-5.2' into asoc-linus
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@@ -240,10 +240,8 @@ static int ad193x_set_dai_fmt(struct snd_soc_dai *codec_dai,
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}
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/* For DSP_*, LRCLK's polarity must be inverted */
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if (fmt & SND_SOC_DAIFMT_DSP_A) {
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change_bit(ffs(AD193X_DAC_LEFT_HIGH) - 1,
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(unsigned long *)&dac_fmt);
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}
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if (fmt & SND_SOC_DAIFMT_DSP_A)
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dac_fmt ^= AD193X_DAC_LEFT_HIGH;
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM: /* codec clk & frm master */
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@@ -538,6 +538,29 @@ static struct hdac_hdmi_port *hdac_hdmi_get_port_from_cvt(
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return NULL;
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}
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/*
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* Go through all converters and ensure connection is set to
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* the correct pin as set via kcontrols.
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*/
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static void hdac_hdmi_verify_connect_sel_all_pins(struct hdac_device *hdev)
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{
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struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
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struct hdac_hdmi_port *port;
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struct hdac_hdmi_cvt *cvt;
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int cvt_idx = 0;
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list_for_each_entry(cvt, &hdmi->cvt_list, head) {
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port = hdac_hdmi_get_port_from_cvt(hdev, hdmi, cvt);
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if (port && port->pin) {
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snd_hdac_codec_write(hdev, port->pin->nid, 0,
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AC_VERB_SET_CONNECT_SEL, cvt_idx);
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dev_dbg(&hdev->dev, "%s: %s set connect %d -> %d\n",
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__func__, cvt->name, port->pin->nid, cvt_idx);
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}
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++cvt_idx;
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}
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}
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/*
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* This tries to get a valid pin and set the HW constraints based on the
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* ELD. Even if a valid pin is not found return success so that device open
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@@ -798,6 +821,14 @@ static int hdac_hdmi_cvt_output_widget_event(struct snd_soc_dapm_widget *w,
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AC_VERB_SET_CHANNEL_STREAMID, pcm->stream_tag);
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snd_hdac_codec_write(hdev, cvt->nid, 0,
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AC_VERB_SET_STREAM_FORMAT, pcm->format);
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/*
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* The connection indices are shared by all converters and
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* may interfere with each other. Ensure correct
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* routing for all converters at stream start.
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*/
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hdac_hdmi_verify_connect_sel_all_pins(hdev);
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break;
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case SND_SOC_DAPM_POST_PMD:
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@@ -1880,6 +1880,10 @@ static void nau8825_init_regs(struct nau8825 *nau8825)
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NAU8825_JACK_EJECT_DEBOUNCE_MASK,
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nau8825->jack_eject_debounce << NAU8825_JACK_EJECT_DEBOUNCE_SFT);
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/* Pull up IRQ pin */
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regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK,
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NAU8825_IRQ_PIN_PULLUP | NAU8825_IRQ_PIN_PULL_EN,
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NAU8825_IRQ_PIN_PULLUP | NAU8825_IRQ_PIN_PULL_EN);
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/* Mask unneeded IRQs: 1 - disable, 0 - enable */
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regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, 0x7ff, 0x7ff);
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@@ -168,6 +168,8 @@
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#define NAU8825_JACK_POLARITY (1 << 1) /* 0 - active low, 1 - active high */
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/* INTERRUPT_MASK (0xf) */
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#define NAU8825_IRQ_PIN_PULLUP (1 << 14)
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#define NAU8825_IRQ_PIN_PULL_EN (1 << 13)
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#define NAU8825_IRQ_OUTPUT_EN (1 << 11)
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#define NAU8825_IRQ_HEADSET_COMPLETE_EN (1 << 10)
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#define NAU8825_IRQ_RMS_EN (1 << 8)
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