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x86/perf: Avoid warning for Arch LBR without XSAVE

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[ Upstream commit 8c16dc047b5dd8f7b3bf4584fa75733ea0dde7dc ]

Some hypervisors support Arch LBR, but without the LBR XSAVE support.
The current Arch LBR init code prints a warning when the xsave size (0) is
unexpected. Avoid printing the warning for the "no LBR XSAVE" case.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20211215204029.150686-1-ak@linux.intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Andi Kleen
2021-12-15 12:40:29 -08:00
committed by Greg Kroah-Hartman
parent b37dd03f2f
commit 0d6b9d15ec
1 changed files with 3 additions and 0 deletions
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3
arch/x86/events/intel/lbr.c
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@@ -1734,6 +1734,9 @@ static bool is_arch_lbr_xsave_available(void)
* Check the LBR state with the corresponding software structure. * Check the LBR state with the corresponding software structure.
* Disable LBR XSAVES support if the size doesn't match. * Disable LBR XSAVES support if the size doesn't match.
*/ */
if (xfeature_size(XFEATURE_LBR) == 0)
return false;
if (WARN_ON(xfeature_size(XFEATURE_LBR) != get_lbr_state_size())) if (WARN_ON(xfeature_size(XFEATURE_LBR) != get_lbr_state_size()))
return false; return false;