libata: convert to iomap
Convert libata core layer and LLDs to use iomap. * managed iomap is used. Pointer to pcim_iomap_table() is cached at host->iomap and used through out LLDs. This basically replaces host->mmio_base. * if possible, pcim_iomap_regions() is used Most iomap operation conversions are taken from Jeff Garzik <jgarzik@pobox.com>'s iomap branch. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@@ -117,7 +117,7 @@ static const struct ata_port_operations sis_ops = {
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.bmdma_status = ata_bmdma_status,
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.qc_prep = ata_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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.data_xfer = ata_pio_data_xfer,
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.data_xfer = ata_data_xfer,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = ata_bmdma_error_handler,
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@@ -223,11 +223,11 @@ static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg)
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pci_read_config_byte(pdev, SIS_PMR, &pmr);
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val = inl(ap->ioaddr.scr_addr + (sc_reg * 4));
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val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4));
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if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) ||
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(pdev->device == 0x1183) || (pmr & SIS_PMR_COMBINED))
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val2 = inl(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10);
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val2 = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10);
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return (val | val2) & 0xfffffffb;
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}
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@@ -245,10 +245,10 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
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if (ap->flags & SIS_FLAG_CFGSCR)
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sis_scr_cfg_write(ap, sc_reg, val);
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else {
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outl(val, ap->ioaddr.scr_addr + (sc_reg * 4));
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iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4));
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if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) ||
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(pdev->device == 0x1183) || (pmr & SIS_PMR_COMBINED))
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outl(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10);
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iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10);
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}
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}
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@@ -353,10 +353,14 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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return -ENOMEM;
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if (!(probe_ent->port_flags & SIS_FLAG_CFGSCR)) {
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probe_ent->port[0].scr_addr =
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pci_resource_start(pdev, SIS_SCR_PCI_BAR);
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probe_ent->port[1].scr_addr =
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pci_resource_start(pdev, SIS_SCR_PCI_BAR) + port2_start;
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void *mmio;
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mmio = pcim_iomap(pdev, SIS_SCR_PCI_BAR, 0);
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if (!mmio)
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return -ENOMEM;
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probe_ent->port[0].scr_addr = mmio;
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probe_ent->port[1].scr_addr = mmio + port2_start;
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}
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pci_set_master(pdev);
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