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Merge tag 'clk-renesas-for-v4.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

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Pull Renesas clk driver updates from Geert Uytterhoeven:

  - Add support for the Clock Pulse Generator / Module Standby and
    Software Reset module on revision ES2.0 of the R-Car H3 SoC, which
    differs from ES1.x in some areas.
  - Add IMR clocks for R-Car H3 and M3-W,
  - Add workaround for PLL0/2/4 errata on R-Car H3 ES1.0,
  - Small fixes and cleanups.

* tag 'clk-renesas-for-v4.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: rcar-gen3-cpg: Add support for RCLK on R-Car H3 ES2.0
  clk: renesas: r8a7795: Add support for R-Car H3 ES2.0
  clk: renesas: Add r8a7795 ES2.0 CPG Core Clock Definitions
  clk: renesas: cpg-mssr: Add support for fixing up clock tables
  clk: renesas: rcar-gen3: Add workaround for PLL0/2/4 errata on H3 ES1.0
  clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()
  clk: renesas: r8a7796: Reformat core clock table
  clk: renesas: r8a7795: Reformat core clock table
  clk: renesas: r8a7796: Correct name of watchdog clock
  clk: renesas: r8a7795: Correct name of watchdog clock
  clk: renesas: r8a7795: Correct parent clock and sort order for Audio DMACs
  clk: renesas: r8a7796: Add IMR clocks
  clk: renesas: r8a7795: Add IMR clocks
This commit is contained in:
Michael Turquette
2017-04-12 18:49:36 +02:00
parent f37753e2a3 bb1953067c
commit 0d4ae36062
7 changed files with 305 additions and 77 deletions
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7
include/dt-bindings/clock/r8a7795-cpg-mssr.h
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@@ -60,4 +60,11 @@
#define R8A7795_CLK_R 45
#define R8A7795_CLK_OSC 46
/* r8a7795 ES2.0 CPG Core Clocks */
#define R8A7795_CLK_S0D2 47
#define R8A7795_CLK_S0D3 48
#define R8A7795_CLK_S0D6 49
#define R8A7795_CLK_S0D8 50
#define R8A7795_CLK_S0D12 51
#endif /* __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ */