Merge tag 'kvm-4.20-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM updates from Radim Krčmář: "ARM: - Improved guest IPA space support (32 to 52 bits) - RAS event delivery for 32bit - PMU fixes - Guest entry hardening - Various cleanups - Port of dirty_log_test selftest PPC: - Nested HV KVM support for radix guests on POWER9. The performance is much better than with PR KVM. Migration and arbitrary level of nesting is supported. - Disable nested HV-KVM on early POWER9 chips that need a particular hardware bug workaround - One VM per core mode to prevent potential data leaks - PCI pass-through optimization - merge ppc-kvm topic branch and kvm-ppc-fixes to get a better base s390: - Initial version of AP crypto virtualization via vfio-mdev - Improvement for vfio-ap - Set the host program identifier - Optimize page table locking x86: - Enable nested virtualization by default - Implement Hyper-V IPI hypercalls - Improve #PF and #DB handling - Allow guests to use Enlightened VMCS - Add migration selftests for VMCS and Enlightened VMCS - Allow coalesced PIO accesses - Add an option to perform nested VMCS host state consistency check through hardware - Automatic tuning of lapic_timer_advance_ns - Many fixes, minor improvements, and cleanups" * tag 'kvm-4.20-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (204 commits) KVM/nVMX: Do not validate that posted_intr_desc_addr is page aligned Revert "kvm: x86: optimize dr6 restore" KVM: PPC: Optimize clearing TCEs for sparse tables x86/kvm/nVMX: tweak shadow fields selftests/kvm: add missing executables to .gitignore KVM: arm64: Safety check PSTATE when entering guest and handle IL KVM: PPC: Book3S HV: Don't use streamlined entry path on early POWER9 chips arm/arm64: KVM: Enable 32 bits kvm vcpu events support arm/arm64: KVM: Rename function kvm_arch_dev_ioctl_check_extension() KVM: arm64: Fix caching of host MDCR_EL2 value KVM: VMX: enable nested virtualization by default KVM/x86: Use 32bit xor to clear registers in svm.c kvm: x86: Introduce KVM_CAP_EXCEPTION_PAYLOAD kvm: vmx: Defer setting of DR6 until #DB delivery kvm: x86: Defer setting of CR2 until #PF delivery kvm: x86: Add payload operands to kvm_multiple_exception kvm: x86: Add exception payload fields to kvm_vcpu_events kvm: x86: Add has_payload and payload to kvm_queued_exception KVM: Documentation: Fix omission in struct kvm_vcpu_events KVM: selftests: add Enlightened VMCS test ...
This commit is contained in:
@@ -150,4 +150,25 @@ extern s32 patch__memset_nocache, patch__memcpy_nocache;
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extern long flush_count_cache;
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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void kvmppc_save_tm_hv(struct kvm_vcpu *vcpu, u64 msr, bool preserve_nv);
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void kvmppc_restore_tm_hv(struct kvm_vcpu *vcpu, u64 msr, bool preserve_nv);
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#else
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static inline void kvmppc_save_tm_hv(struct kvm_vcpu *vcpu, u64 msr,
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bool preserve_nv) { }
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static inline void kvmppc_restore_tm_hv(struct kvm_vcpu *vcpu, u64 msr,
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bool preserve_nv) { }
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#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
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void kvmhv_save_host_pmu(void);
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void kvmhv_load_host_pmu(void);
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void kvmhv_save_guest_pmu(struct kvm_vcpu *vcpu, bool pmu_in_use);
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void kvmhv_load_guest_pmu(struct kvm_vcpu *vcpu);
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int __kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu);
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long kvmppc_h_set_dabr(struct kvm_vcpu *vcpu, unsigned long dabr);
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long kvmppc_h_set_xdabr(struct kvm_vcpu *vcpu, unsigned long dabr,
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unsigned long dabrx);
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#endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */
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@@ -203,6 +203,18 @@ static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize)
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BUG();
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}
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static inline unsigned int ap_to_shift(unsigned long ap)
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{
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int psize;
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for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
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if (mmu_psize_defs[psize].ap == ap)
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return mmu_psize_defs[psize].shift;
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}
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return -1;
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}
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static inline unsigned long get_sllp_encoding(int psize)
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{
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unsigned long sllp;
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@@ -53,6 +53,7 @@ extern void radix__flush_tlb_lpid_page(unsigned int lpid,
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unsigned long addr,
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unsigned long page_size);
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extern void radix__flush_pwc_lpid(unsigned int lpid);
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extern void radix__flush_tlb_lpid(unsigned int lpid);
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extern void radix__local_flush_tlb_lpid(unsigned int lpid);
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extern void radix__local_flush_tlb_lpid_guest(unsigned int lpid);
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@@ -322,6 +322,11 @@
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#define H_GET_24X7_DATA 0xF07C
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#define H_GET_PERF_COUNTER_INFO 0xF080
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/* Platform-specific hcalls used for nested HV KVM */
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#define H_SET_PARTITION_TABLE 0xF800
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#define H_ENTER_NESTED 0xF804
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#define H_TLB_INVALIDATE 0xF808
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/* Values for 2nd argument to H_SET_MODE */
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#define H_SET_MODE_RESOURCE_SET_CIABR 1
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#define H_SET_MODE_RESOURCE_SET_DAWR 2
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@@ -461,6 +466,42 @@ struct h_cpu_char_result {
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u64 behaviour;
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};
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/* Register state for entering a nested guest with H_ENTER_NESTED */
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struct hv_guest_state {
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u64 version; /* version of this structure layout */
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u32 lpid;
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u32 vcpu_token;
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/* These registers are hypervisor privileged (at least for writing) */
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u64 lpcr;
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u64 pcr;
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u64 amor;
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u64 dpdes;
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u64 hfscr;
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s64 tb_offset;
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u64 dawr0;
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u64 dawrx0;
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u64 ciabr;
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u64 hdec_expiry;
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u64 purr;
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u64 spurr;
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u64 ic;
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u64 vtb;
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u64 hdar;
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u64 hdsisr;
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u64 heir;
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u64 asdr;
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/* These are OS privileged but need to be set late in guest entry */
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u64 srr0;
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u64 srr1;
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u64 sprg[4];
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u64 pidr;
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u64 cfar;
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u64 ppr;
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};
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/* Latest version of hv_guest_state structure */
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#define HV_GUEST_STATE_VERSION 1
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_HVCALL_H */
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@@ -126,7 +126,7 @@ struct iommu_table {
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int it_nid;
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};
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#define IOMMU_TABLE_USERSPACE_ENTRY_RM(tbl, entry) \
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#define IOMMU_TABLE_USERSPACE_ENTRY_RO(tbl, entry) \
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((tbl)->it_ops->useraddrptr((tbl), (entry), false))
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#define IOMMU_TABLE_USERSPACE_ENTRY(tbl, entry) \
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((tbl)->it_ops->useraddrptr((tbl), (entry), true))
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@@ -84,7 +84,6 @@
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#define BOOK3S_INTERRUPT_INST_STORAGE 0x400
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#define BOOK3S_INTERRUPT_INST_SEGMENT 0x480
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#define BOOK3S_INTERRUPT_EXTERNAL 0x500
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#define BOOK3S_INTERRUPT_EXTERNAL_LEVEL 0x501
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#define BOOK3S_INTERRUPT_EXTERNAL_HV 0x502
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#define BOOK3S_INTERRUPT_ALIGNMENT 0x600
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#define BOOK3S_INTERRUPT_PROGRAM 0x700
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@@ -134,8 +133,7 @@
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#define BOOK3S_IRQPRIO_EXTERNAL 14
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#define BOOK3S_IRQPRIO_DECREMENTER 15
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#define BOOK3S_IRQPRIO_PERFORMANCE_MONITOR 16
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#define BOOK3S_IRQPRIO_EXTERNAL_LEVEL 17
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#define BOOK3S_IRQPRIO_MAX 18
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#define BOOK3S_IRQPRIO_MAX 17
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#define BOOK3S_HFLAG_DCBZ32 0x1
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#define BOOK3S_HFLAG_SLB 0x2
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@@ -188,14 +188,37 @@ extern int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hc);
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extern int kvmppc_book3s_radix_page_fault(struct kvm_run *run,
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struct kvm_vcpu *vcpu,
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unsigned long ea, unsigned long dsisr);
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extern int kvmppc_mmu_walk_radix_tree(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *gpte, u64 root,
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u64 *pte_ret_p);
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extern int kvmppc_mmu_radix_translate_table(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *gpte, u64 table,
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int table_index, u64 *pte_ret_p);
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extern int kvmppc_mmu_radix_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *gpte, bool data, bool iswrite);
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extern void kvmppc_unmap_pte(struct kvm *kvm, pte_t *pte, unsigned long gpa,
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unsigned int shift, struct kvm_memory_slot *memslot,
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unsigned int lpid);
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extern bool kvmppc_hv_handle_set_rc(struct kvm *kvm, pgd_t *pgtable,
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bool writing, unsigned long gpa,
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unsigned int lpid);
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extern int kvmppc_book3s_instantiate_page(struct kvm_vcpu *vcpu,
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unsigned long gpa,
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struct kvm_memory_slot *memslot,
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bool writing, bool kvm_ro,
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pte_t *inserted_pte, unsigned int *levelp);
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extern int kvmppc_init_vm_radix(struct kvm *kvm);
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extern void kvmppc_free_radix(struct kvm *kvm);
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extern void kvmppc_free_pgtable_radix(struct kvm *kvm, pgd_t *pgd,
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unsigned int lpid);
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extern int kvmppc_radix_init(void);
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extern void kvmppc_radix_exit(void);
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extern int kvm_unmap_radix(struct kvm *kvm, struct kvm_memory_slot *memslot,
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unsigned long gfn);
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extern void kvmppc_unmap_pte(struct kvm *kvm, pte_t *pte,
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unsigned long gpa, unsigned int shift,
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struct kvm_memory_slot *memslot,
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unsigned int lpid);
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extern int kvm_age_radix(struct kvm *kvm, struct kvm_memory_slot *memslot,
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unsigned long gfn);
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extern int kvm_test_age_radix(struct kvm *kvm, struct kvm_memory_slot *memslot,
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@@ -271,6 +294,21 @@ static inline void kvmppc_save_tm_sprs(struct kvm_vcpu *vcpu) {}
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static inline void kvmppc_restore_tm_sprs(struct kvm_vcpu *vcpu) {}
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#endif
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long kvmhv_nested_init(void);
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void kvmhv_nested_exit(void);
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void kvmhv_vm_nested_init(struct kvm *kvm);
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long kvmhv_set_partition_table(struct kvm_vcpu *vcpu);
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void kvmhv_set_ptbl_entry(unsigned int lpid, u64 dw0, u64 dw1);
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void kvmhv_release_all_nested(struct kvm *kvm);
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long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu);
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long kvmhv_do_nested_tlbie(struct kvm_vcpu *vcpu);
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int kvmhv_run_single_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu,
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u64 time_limit, unsigned long lpcr);
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void kvmhv_save_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr);
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void kvmhv_restore_hv_return_state(struct kvm_vcpu *vcpu,
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struct hv_guest_state *hr);
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long int kvmhv_nested_page_fault(struct kvm_vcpu *vcpu);
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void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac);
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extern int kvm_irq_bypass;
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@@ -301,12 +339,12 @@ static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
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static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
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{
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vcpu->arch.cr = val;
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vcpu->arch.regs.ccr = val;
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}
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static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.cr;
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return vcpu->arch.regs.ccr;
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}
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static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, ulong val)
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@@ -384,9 +422,6 @@ extern int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu);
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/* TO = 31 for unconditional trap */
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#define INS_TW 0x7fe00008
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/* LPIDs we support with this build -- runtime limit may be lower */
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#define KVMPPC_NR_LPIDS (LPID_RSVD + 1)
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#define SPLIT_HACK_MASK 0xff000000
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#define SPLIT_HACK_OFFS 0xfb000000
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@@ -23,6 +23,108 @@
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#include <linux/string.h>
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#include <asm/bitops.h>
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#include <asm/book3s/64/mmu-hash.h>
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#include <asm/cpu_has_feature.h>
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#include <asm/ppc-opcode.h>
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#ifdef CONFIG_PPC_PSERIES
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static inline bool kvmhv_on_pseries(void)
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{
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return !cpu_has_feature(CPU_FTR_HVMODE);
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}
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#else
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static inline bool kvmhv_on_pseries(void)
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{
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return false;
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}
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#endif
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/*
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* Structure for a nested guest, that is, for a guest that is managed by
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* one of our guests.
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*/
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struct kvm_nested_guest {
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struct kvm *l1_host; /* L1 VM that owns this nested guest */
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int l1_lpid; /* lpid L1 guest thinks this guest is */
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int shadow_lpid; /* real lpid of this nested guest */
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pgd_t *shadow_pgtable; /* our page table for this guest */
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u64 l1_gr_to_hr; /* L1's addr of part'n-scoped table */
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u64 process_table; /* process table entry for this guest */
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long refcnt; /* number of pointers to this struct */
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struct mutex tlb_lock; /* serialize page faults and tlbies */
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struct kvm_nested_guest *next;
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cpumask_t need_tlb_flush;
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cpumask_t cpu_in_guest;
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short prev_cpu[NR_CPUS];
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};
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/*
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* We define a nested rmap entry as a single 64-bit quantity
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* 0xFFF0000000000000 12-bit lpid field
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* 0x000FFFFFFFFFF000 40-bit guest 4k page frame number
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* 0x0000000000000001 1-bit single entry flag
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*/
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#define RMAP_NESTED_LPID_MASK 0xFFF0000000000000UL
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#define RMAP_NESTED_LPID_SHIFT (52)
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#define RMAP_NESTED_GPA_MASK 0x000FFFFFFFFFF000UL
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#define RMAP_NESTED_IS_SINGLE_ENTRY 0x0000000000000001UL
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/* Structure for a nested guest rmap entry */
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struct rmap_nested {
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struct llist_node list;
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u64 rmap;
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};
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/*
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* for_each_nest_rmap_safe - iterate over the list of nested rmap entries
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* safe against removal of the list entry or NULL list
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* @pos: a (struct rmap_nested *) to use as a loop cursor
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* @node: pointer to the first entry
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* NOTE: this can be NULL
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* @rmapp: an (unsigned long *) in which to return the rmap entries on each
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* iteration
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* NOTE: this must point to already allocated memory
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*
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* The nested_rmap is a llist of (struct rmap_nested) entries pointed to by the
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* rmap entry in the memslot. The list is always terminated by a "single entry"
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* stored in the list element of the final entry of the llist. If there is ONLY
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* a single entry then this is itself in the rmap entry of the memslot, not a
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* llist head pointer.
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*
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* Note that the iterator below assumes that a nested rmap entry is always
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* non-zero. This is true for our usage because the LPID field is always
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* non-zero (zero is reserved for the host).
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*
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* This should be used to iterate over the list of rmap_nested entries with
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* processing done on the u64 rmap value given by each iteration. This is safe
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* against removal of list entries and it is always safe to call free on (pos).
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*
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* e.g.
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* struct rmap_nested *cursor;
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* struct llist_node *first;
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* unsigned long rmap;
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* for_each_nest_rmap_safe(cursor, first, &rmap) {
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* do_something(rmap);
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* free(cursor);
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* }
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*/
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#define for_each_nest_rmap_safe(pos, node, rmapp) \
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for ((pos) = llist_entry((node), typeof(*(pos)), list); \
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(node) && \
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(*(rmapp) = ((RMAP_NESTED_IS_SINGLE_ENTRY & ((u64) (node))) ? \
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((u64) (node)) : ((pos)->rmap))) && \
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(((node) = ((RMAP_NESTED_IS_SINGLE_ENTRY & ((u64) (node))) ? \
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((struct llist_node *) ((pos) = NULL)) : \
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(pos)->list.next)), true); \
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(pos) = llist_entry((node), typeof(*(pos)), list))
|
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|
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struct kvm_nested_guest *kvmhv_get_nested(struct kvm *kvm, int l1_lpid,
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bool create);
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void kvmhv_put_nested(struct kvm_nested_guest *gp);
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int kvmhv_nested_next_lpid(struct kvm *kvm, int lpid);
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|
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/* Encoding of first parameter for H_TLB_INVALIDATE */
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#define H_TLBIE_P1_ENC(ric, prs, r) (___PPC_RIC(ric) | ___PPC_PRS(prs) | \
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___PPC_R(r))
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/* Power architecture requires HPT is at least 256kiB, at most 64TiB */
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#define PPC_MIN_HPT_ORDER 18
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@@ -435,6 +537,7 @@ static inline struct kvm_memslots *kvm_memslots_raw(struct kvm *kvm)
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}
|
||||
|
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extern void kvmppc_mmu_debugfs_init(struct kvm *kvm);
|
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extern void kvmhv_radix_debugfs_init(struct kvm *kvm);
|
||||
|
||||
extern void kvmhv_rm_send_ipi(int cpu);
|
||||
|
||||
@@ -482,7 +585,7 @@ static inline u64 sanitize_msr(u64 msr)
|
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
||||
static inline void copy_from_checkpoint(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
vcpu->arch.cr = vcpu->arch.cr_tm;
|
||||
vcpu->arch.regs.ccr = vcpu->arch.cr_tm;
|
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vcpu->arch.regs.xer = vcpu->arch.xer_tm;
|
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vcpu->arch.regs.link = vcpu->arch.lr_tm;
|
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vcpu->arch.regs.ctr = vcpu->arch.ctr_tm;
|
||||
@@ -499,7 +602,7 @@ static inline void copy_from_checkpoint(struct kvm_vcpu *vcpu)
|
||||
|
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static inline void copy_to_checkpoint(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
vcpu->arch.cr_tm = vcpu->arch.cr;
|
||||
vcpu->arch.cr_tm = vcpu->arch.regs.ccr;
|
||||
vcpu->arch.xer_tm = vcpu->arch.regs.xer;
|
||||
vcpu->arch.lr_tm = vcpu->arch.regs.link;
|
||||
vcpu->arch.ctr_tm = vcpu->arch.regs.ctr;
|
||||
@@ -515,6 +618,17 @@ static inline void copy_to_checkpoint(struct kvm_vcpu *vcpu)
|
||||
}
|
||||
#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
|
||||
|
||||
extern int kvmppc_create_pte(struct kvm *kvm, pgd_t *pgtable, pte_t pte,
|
||||
unsigned long gpa, unsigned int level,
|
||||
unsigned long mmu_seq, unsigned int lpid,
|
||||
unsigned long *rmapp, struct rmap_nested **n_rmap);
|
||||
extern void kvmhv_insert_nest_rmap(struct kvm *kvm, unsigned long *rmapp,
|
||||
struct rmap_nested **n_rmap);
|
||||
extern void kvmhv_remove_nest_rmap_range(struct kvm *kvm,
|
||||
struct kvm_memory_slot *memslot,
|
||||
unsigned long gpa, unsigned long hpa,
|
||||
unsigned long nbytes);
|
||||
|
||||
#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
|
||||
|
||||
#endif /* __ASM_KVM_BOOK3S_64_H__ */
|
||||
|
@@ -25,6 +25,9 @@
|
||||
#define XICS_MFRR 0xc
|
||||
#define XICS_IPI 2 /* interrupt source # for IPIs */
|
||||
|
||||
/* LPIDs we support with this build -- runtime limit may be lower */
|
||||
#define KVMPPC_NR_LPIDS (LPID_RSVD + 1)
|
||||
|
||||
/* Maximum number of threads per physical core */
|
||||
#define MAX_SMT_THREADS 8
|
||||
|
||||
|
@@ -46,12 +46,12 @@ static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
|
||||
|
||||
static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
|
||||
{
|
||||
vcpu->arch.cr = val;
|
||||
vcpu->arch.regs.ccr = val;
|
||||
}
|
||||
|
||||
static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
return vcpu->arch.cr;
|
||||
return vcpu->arch.regs.ccr;
|
||||
}
|
||||
|
||||
static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, ulong val)
|
||||
|
@@ -46,6 +46,7 @@
|
||||
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
||||
#include <asm/kvm_book3s_asm.h> /* for MAX_SMT_THREADS */
|
||||
#define KVM_MAX_VCPU_ID (MAX_SMT_THREADS * KVM_MAX_VCORES)
|
||||
#define KVM_MAX_NESTED_GUESTS KVMPPC_NR_LPIDS
|
||||
|
||||
#else
|
||||
#define KVM_MAX_VCPU_ID KVM_MAX_VCPUS
|
||||
@@ -94,6 +95,7 @@ struct dtl_entry;
|
||||
|
||||
struct kvmppc_vcpu_book3s;
|
||||
struct kvmppc_book3s_shadow_vcpu;
|
||||
struct kvm_nested_guest;
|
||||
|
||||
struct kvm_vm_stat {
|
||||
ulong remote_tlb_flush;
|
||||
@@ -287,10 +289,12 @@ struct kvm_arch {
|
||||
u8 radix;
|
||||
u8 fwnmi_enabled;
|
||||
bool threads_indep;
|
||||
bool nested_enable;
|
||||
pgd_t *pgtable;
|
||||
u64 process_table;
|
||||
struct dentry *debugfs_dir;
|
||||
struct dentry *htab_dentry;
|
||||
struct dentry *radix_dentry;
|
||||
struct kvm_resize_hpt *resize_hpt; /* protected by kvm->lock */
|
||||
#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
|
||||
#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
|
||||
@@ -311,6 +315,9 @@ struct kvm_arch {
|
||||
#endif
|
||||
struct kvmppc_ops *kvm_ops;
|
||||
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
||||
u64 l1_ptcr;
|
||||
int max_nested_lpid;
|
||||
struct kvm_nested_guest *nested_guests[KVM_MAX_NESTED_GUESTS];
|
||||
/* This array can grow quite large, keep it at the end */
|
||||
struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
|
||||
#endif
|
||||
@@ -360,7 +367,9 @@ struct kvmppc_pte {
|
||||
bool may_write : 1;
|
||||
bool may_execute : 1;
|
||||
unsigned long wimg;
|
||||
unsigned long rc;
|
||||
u8 page_size; /* MMU_PAGE_xxx */
|
||||
u8 page_shift;
|
||||
};
|
||||
|
||||
struct kvmppc_mmu {
|
||||
@@ -537,8 +546,6 @@ struct kvm_vcpu_arch {
|
||||
ulong tar;
|
||||
#endif
|
||||
|
||||
u32 cr;
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3S
|
||||
ulong hflags;
|
||||
ulong guest_owned_ext;
|
||||
@@ -707,6 +714,7 @@ struct kvm_vcpu_arch {
|
||||
u8 hcall_needed;
|
||||
u8 epr_flags; /* KVMPPC_EPR_xxx */
|
||||
u8 epr_needed;
|
||||
u8 external_oneshot; /* clear external irq after delivery */
|
||||
|
||||
u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
|
||||
|
||||
@@ -781,6 +789,10 @@ struct kvm_vcpu_arch {
|
||||
u32 emul_inst;
|
||||
|
||||
u32 online;
|
||||
|
||||
/* For support of nested guests */
|
||||
struct kvm_nested_guest *nested;
|
||||
u32 nested_vcpu_id;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
|
||||
|
@@ -194,9 +194,7 @@ extern struct kvmppc_spapr_tce_table *kvmppc_find_table(
|
||||
(iommu_tce_check_ioba((stt)->page_shift, (stt)->offset, \
|
||||
(stt)->size, (ioba), (npages)) ? \
|
||||
H_PARAMETER : H_SUCCESS)
|
||||
extern long kvmppc_tce_validate(struct kvmppc_spapr_tce_table *tt,
|
||||
unsigned long tce);
|
||||
extern long kvmppc_gpa_to_ua(struct kvm *kvm, unsigned long gpa,
|
||||
extern long kvmppc_tce_to_ua(struct kvm *kvm, unsigned long tce,
|
||||
unsigned long *ua, unsigned long **prmap);
|
||||
extern void kvmppc_tce_put(struct kvmppc_spapr_tce_table *tt,
|
||||
unsigned long idx, unsigned long tce);
|
||||
@@ -327,6 +325,7 @@ struct kvmppc_ops {
|
||||
int (*set_smt_mode)(struct kvm *kvm, unsigned long mode,
|
||||
unsigned long flags);
|
||||
void (*giveup_ext)(struct kvm_vcpu *vcpu, ulong msr);
|
||||
int (*enable_nested)(struct kvm *kvm);
|
||||
};
|
||||
|
||||
extern struct kvmppc_ops *kvmppc_hv_ops;
|
||||
@@ -585,6 +584,7 @@ extern int kvmppc_xive_set_icp(struct kvm_vcpu *vcpu, u64 icpval);
|
||||
|
||||
extern int kvmppc_xive_set_irq(struct kvm *kvm, int irq_source_id, u32 irq,
|
||||
int level, bool line_status);
|
||||
extern void kvmppc_xive_push_vcpu(struct kvm_vcpu *vcpu);
|
||||
#else
|
||||
static inline int kvmppc_xive_set_xive(struct kvm *kvm, u32 irq, u32 server,
|
||||
u32 priority) { return -1; }
|
||||
@@ -607,6 +607,7 @@ static inline int kvmppc_xive_set_icp(struct kvm_vcpu *vcpu, u64 icpval) { retur
|
||||
|
||||
static inline int kvmppc_xive_set_irq(struct kvm *kvm, int irq_source_id, u32 irq,
|
||||
int level, bool line_status) { return -ENODEV; }
|
||||
static inline void kvmppc_xive_push_vcpu(struct kvm_vcpu *vcpu) { }
|
||||
#endif /* CONFIG_KVM_XIVE */
|
||||
|
||||
/*
|
||||
@@ -652,6 +653,7 @@ int kvmppc_rm_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
|
||||
unsigned long mfrr);
|
||||
int kvmppc_rm_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr);
|
||||
int kvmppc_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr);
|
||||
void kvmppc_guest_entry_inject_int(struct kvm_vcpu *vcpu);
|
||||
|
||||
/*
|
||||
* Host-side operations we want to set up while running in real
|
||||
|
@@ -104,6 +104,7 @@
|
||||
#define OP_31_XOP_LHZUX 311
|
||||
#define OP_31_XOP_MSGSNDP 142
|
||||
#define OP_31_XOP_MSGCLRP 174
|
||||
#define OP_31_XOP_TLBIE 306
|
||||
#define OP_31_XOP_MFSPR 339
|
||||
#define OP_31_XOP_LWAX 341
|
||||
#define OP_31_XOP_LHAX 343
|
||||
|
@@ -415,6 +415,7 @@
|
||||
#define HFSCR_DSCR __MASK(FSCR_DSCR_LG)
|
||||
#define HFSCR_VECVSX __MASK(FSCR_VECVSX_LG)
|
||||
#define HFSCR_FP __MASK(FSCR_FP_LG)
|
||||
#define HFSCR_INTR_CAUSE (ASM_CONST(0xFF) << 56) /* interrupt cause */
|
||||
#define SPRN_TAR 0x32f /* Target Address Register */
|
||||
#define SPRN_LPCR 0x13E /* LPAR Control Register */
|
||||
#define LPCR_VPM0 ASM_CONST(0x8000000000000000)
|
||||
@@ -766,6 +767,7 @@
|
||||
#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */
|
||||
#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */
|
||||
#define HSRR1_DENORM 0x00100000 /* Denorm exception */
|
||||
#define HSRR1_HISI_WRITE 0x00010000 /* HISI bcs couldn't update mem */
|
||||
|
||||
#define SPRN_TBCTL 0x35f /* PA6T Timebase control register */
|
||||
#define TBCTL_FREEZE 0x0000000000000000ull /* Freeze all tbs */
|
||||
|
@@ -634,6 +634,7 @@ struct kvm_ppc_cpu_char {
|
||||
|
||||
#define KVM_REG_PPC_DEC_EXPIRY (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbe)
|
||||
#define KVM_REG_PPC_ONLINE (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbf)
|
||||
#define KVM_REG_PPC_PTCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc0)
|
||||
|
||||
/* Transactional Memory checkpointed state:
|
||||
* This is all GPRs, all VSX regs and a subset of SPRs
|
||||
|
Reference in New Issue
Block a user