xiaomi-sm8450/android_kernel_xiaomi_sm8450
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Revert "cxl: Add support for interrupts on the Mellanox CX4"

Bläddra i källkod 
Remove abandonned capi support for the Mellanox CX4.

This reverts commit a2f67d5ee8.

Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Alastair D'Silva
2018-06-28 12:05:01 +02:00
committad av Michael Ellerman
förälder c582815006
incheckning 0cfd7335d1
8 ändrade filer med 0 tillägg och 202 borttagningar
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71
drivers/misc/cxl/api.c
Visa fil

@@ -11,7 +11,6 @@
#include <linux/slab.h>
#include <linux/file.h>
#include <misc/cxl.h>
#include <linux/msi.h>
#include <linux/module.h>
#include <linux/mount.h>
#include <linux/sched/mm.h>
@@ -595,73 +594,3 @@ int cxl_get_max_irqs_per_process(struct pci_dev *dev)
return afu->irqs_max;
}
EXPORT_SYMBOL_GPL(cxl_get_max_irqs_per_process);
/*
* This is a special interrupt allocation routine called from the PHB's MSI
* setup function. When capi interrupts are allocated in this manner they must
* still be associated with a running context, but since the MSI APIs have no
* way to specify this we use the default context associated with the device.
*
* The Mellanox CX4 has a hardware limitation that restricts the maximum AFU
* interrupt number, so in order to overcome this their driver informs us of
* the restriction by setting the maximum interrupts per context, and we
* allocate additional contexts as necessary so that we can keep the AFU
* interrupt number within the supported range.
*/
int _cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
{
struct cxl_context *ctx, *new_ctx, *default_ctx;
int remaining;
int rc;
ctx = default_ctx = cxl_get_context(pdev);
if (WARN_ON(!default_ctx))
return -ENODEV;
remaining = nvec;
while (remaining > 0) {
rc = cxl_allocate_afu_irqs(ctx, min(remaining, ctx->afu->irqs_max));
if (rc) {
pr_warn("%s: Failed to find enough free MSIs\n", pci_name(pdev));
return rc;
}
remaining -= ctx->afu->irqs_max;
if (ctx != default_ctx && default_ctx->status == STARTED) {
WARN_ON(cxl_start_context(ctx,
be64_to_cpu(default_ctx->elem->common.wed),
NULL));
}
if (remaining > 0) {
new_ctx = cxl_dev_context_init(pdev);
if (IS_ERR(new_ctx)) {
pr_warn("%s: Failed to allocate enough contexts for MSIs\n", pci_name(pdev));
return -ENOSPC;
}
list_add(&new_ctx->extra_irq_contexts, &ctx->extra_irq_contexts);
ctx = new_ctx;
}
}
return 0;
}
/* Exported via cxl_base */
void _cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev)
{
struct cxl_context *ctx, *pos, *tmp;
ctx = cxl_get_context(pdev);
if (WARN_ON(!ctx))
return;
cxl_free_afu_irqs(ctx);
list_for_each_entry_safe(pos, tmp, &ctx->extra_irq_contexts, extra_irq_contexts) {
cxl_stop_context(pos);
cxl_free_afu_irqs(pos);
list_del(&pos->extra_irq_contexts);
cxl_release_context(pos);
}
}
/* Exported via cxl_base */

31
drivers/misc/cxl/base.c
Visa fil

@@ -158,37 +158,6 @@ int cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_
}
EXPORT_SYMBOL_GPL(cxl_next_msi_hwirq);
int cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
{
int ret;
struct cxl_calls *calls;
calls = cxl_calls_get();
if (!calls)
return false;
ret = calls->cxl_cx4_setup_msi_irqs(pdev, nvec, type);
cxl_calls_put(calls);
return ret;
}
EXPORT_SYMBOL_GPL(cxl_cx4_setup_msi_irqs);
void cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev)
{
struct cxl_calls *calls;
calls = cxl_calls_get();
if (!calls)
return;
calls->cxl_cx4_teardown_msi_irqs(pdev);
cxl_calls_put(calls);
}
EXPORT_SYMBOL_GPL(cxl_cx4_teardown_msi_irqs);
static int __init cxl_base_init(void)
{
struct device_node *np;

4
drivers/misc/cxl/cxl.h
Visa fil

@@ -879,16 +879,12 @@ ssize_t cxl_pci_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
bool _cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu);
void _cxl_pci_disable_device(struct pci_dev *dev);
int _cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq);
int _cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
void _cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev);
struct cxl_calls {
void (*cxl_slbia)(struct mm_struct *mm);
bool (*cxl_pci_associate_default_context)(struct pci_dev *dev, struct cxl_afu *afu);
void (*cxl_pci_disable_device)(struct pci_dev *dev);
int (*cxl_next_msi_hwirq)(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq);
int (*cxl_cx4_setup_msi_irqs)(struct pci_dev *pdev, int nvec, int type);
void (*cxl_cx4_teardown_msi_irqs)(struct pci_dev *pdev);
struct module *owner;
};

2
drivers/misc/cxl/main.c
Visa fil

@@ -107,8 +107,6 @@ static struct cxl_calls cxl_calls = {
.cxl_pci_associate_default_context = _cxl_pci_associate_default_context,
.cxl_pci_disable_device = _cxl_pci_disable_device,
.cxl_next_msi_hwirq = _cxl_next_msi_hwirq,
.cxl_cx4_setup_msi_irqs = _cxl_cx4_setup_msi_irqs,
.cxl_cx4_teardown_msi_irqs = _cxl_cx4_teardown_msi_irqs,
.owner = THIS_MODULE,
};