clk: mxs: remove the use of mach level IO accessor
It removes the use of mach level IO accessor __mxs_setl/clrl, and hence removes mach header inclusion from clock driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org>
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@@ -16,7 +16,6 @@
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <mach/mx28.h>
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#include "clk.h"
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static void __iomem *clkctrl;
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@@ -75,8 +74,8 @@ int mxs_saif_clkmux_select(unsigned int clkmux)
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if (clkmux > 0x3)
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return -EINVAL;
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__mxs_clrl(0x3 << BP_SAIF_CLKMUX, DIGCTRL);
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__mxs_setl(clkmux << BP_SAIF_CLKMUX, DIGCTRL);
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writel_relaxed(0x3 << BP_SAIF_CLKMUX, DIGCTRL + CLR);
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writel_relaxed(clkmux << BP_SAIF_CLKMUX, DIGCTRL + SET);
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return 0;
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}
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@@ -86,13 +85,13 @@ static void __init clk_misc_init(void)
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u32 val;
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/* Gate off cpu clock in WFI for power saving */
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__mxs_setl(1 << BP_CPU_INTERRUPT_WAIT, CPU);
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writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET);
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/* 0 is a bad default value for a divider */
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__mxs_setl(1 << BP_ENET_DIV_TIME, ENET);
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writel_relaxed(1 << BP_ENET_DIV_TIME, ENET + SET);
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/* Clear BYPASS for SAIF */
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__mxs_clrl(0x3 << BP_CLKSEQ_BYPASS_SAIF0, CLKSEQ);
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writel_relaxed(0x3 << BP_CLKSEQ_BYPASS_SAIF0, CLKSEQ + CLR);
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/* SAIF has to use frac div for functional operation */
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val = readl_relaxed(SAIF0);
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@@ -112,7 +111,7 @@ static void __init clk_misc_init(void)
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* Source ssp clock from ref_io than ref_xtal,
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* as ref_xtal only provides 24 MHz as maximum.
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*/
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__mxs_clrl(0xf << BP_CLKSEQ_BYPASS_SSP0, CLKSEQ);
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writel_relaxed(0xf << BP_CLKSEQ_BYPASS_SSP0, CLKSEQ + CLR);
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/*
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* 480 MHz seems too high to be ssp clock source directly,
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