Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts: drivers/net/ethernet/freescale/fec_main.c drivers/net/ethernet/renesas/sh_eth.c net/ipv4/gre.c The GRE conflict is between a bug fix (kfree_skb --> kfree_skb_list) and the splitting of the gre.c code into seperate files. The FEC conflict was two sets of changes adding ethtool support code in an "!CONFIG_M5272" CPP protected block. Finally the sh_eth.c conflict was between one commit add bits set in the .eesr_err_check mask whilst another commit removed the .tx_error_check member and assignments. Signed-off-by: David S. Miller <davem@davemloft.net>
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@@ -287,8 +287,8 @@ struct dma_features {
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#define MAC_RNABLE_RX 0x00000004 /* Receiver Enable */
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/* Default LPI timers */
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#define STMMAC_DEFAULT_LIT_LS_TIMER 0x3E8
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#define STMMAC_DEFAULT_TWT_LS_TIMER 0x0
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#define STMMAC_DEFAULT_LIT_LS 0x3E8
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#define STMMAC_DEFAULT_TWT_LS 0x0
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#define STMMAC_CHAIN_MODE 0x1
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#define STMMAC_RING_MODE 0x2
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@@ -104,7 +104,7 @@ static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
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static int eee_timer = STMMAC_DEFAULT_LPI_TIMER;
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module_param(eee_timer, int, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(eee_timer, "LPI tx expiration time in msec");
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#define STMMAC_LPI_TIMER(x) (jiffies + msecs_to_jiffies(x))
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#define STMMAC_LPI_T(x) (jiffies + msecs_to_jiffies(x))
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/* By default the driver will use the ring mode to manage tx and rx descriptors
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* but passing this value so user can force to use the chain instead of the ring
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@@ -260,7 +260,7 @@ static void stmmac_eee_ctrl_timer(unsigned long arg)
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struct stmmac_priv *priv = (struct stmmac_priv *)arg;
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stmmac_enable_eee_mode(priv);
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mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_TIMER(eee_timer));
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mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(eee_timer));
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}
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/**
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@@ -276,22 +276,34 @@ bool stmmac_eee_init(struct stmmac_priv *priv)
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{
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bool ret = false;
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/* Using PCS we cannot dial with the phy registers at this stage
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* so we do not support extra feature like EEE.
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*/
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if ((priv->pcs == STMMAC_PCS_RGMII) || (priv->pcs == STMMAC_PCS_TBI) ||
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(priv->pcs == STMMAC_PCS_RTBI))
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goto out;
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/* MAC core supports the EEE feature. */
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if (priv->dma_cap.eee) {
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/* Check if the PHY supports EEE */
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if (phy_init_eee(priv->phydev, 1))
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goto out;
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priv->eee_active = 1;
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init_timer(&priv->eee_ctrl_timer);
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priv->eee_ctrl_timer.function = stmmac_eee_ctrl_timer;
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priv->eee_ctrl_timer.data = (unsigned long)priv;
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priv->eee_ctrl_timer.expires = STMMAC_LPI_TIMER(eee_timer);
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add_timer(&priv->eee_ctrl_timer);
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if (!priv->eee_active) {
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priv->eee_active = 1;
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init_timer(&priv->eee_ctrl_timer);
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priv->eee_ctrl_timer.function = stmmac_eee_ctrl_timer;
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priv->eee_ctrl_timer.data = (unsigned long)priv;
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priv->eee_ctrl_timer.expires = STMMAC_LPI_T(eee_timer);
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add_timer(&priv->eee_ctrl_timer);
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priv->hw->mac->set_eee_timer(priv->ioaddr,
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STMMAC_DEFAULT_LIT_LS_TIMER,
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priv->tx_lpi_timer);
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priv->hw->mac->set_eee_timer(priv->ioaddr,
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STMMAC_DEFAULT_LIT_LS,
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priv->tx_lpi_timer);
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} else
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/* Set HW EEE according to the speed */
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priv->hw->mac->set_eee_pls(priv->ioaddr,
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priv->phydev->link);
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pr_info("stmmac: Energy-Efficient Ethernet initialized\n");
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@@ -301,20 +313,6 @@ out:
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return ret;
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}
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/**
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* stmmac_eee_adjust: adjust HW EEE according to the speed
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* @priv: driver private structure
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* Description:
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* When the EEE has been already initialised we have to
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* modify the PLS bit in the LPI ctrl & status reg according
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* to the PHY link status. For this reason.
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*/
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static void stmmac_eee_adjust(struct stmmac_priv *priv)
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{
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if (priv->eee_enabled)
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priv->hw->mac->set_eee_pls(priv->ioaddr, priv->phydev->link);
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}
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/* stmmac_get_tx_hwtstamp: get HW TX timestamps
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* @priv: driver private structure
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* @entry : descriptor index to be used.
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@@ -738,7 +736,10 @@ static void stmmac_adjust_link(struct net_device *dev)
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if (new_state && netif_msg_link(priv))
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phy_print_status(phydev);
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stmmac_eee_adjust(priv);
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/* At this stage, it could be needed to setup the EEE or adjust some
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* MAC related HW registers.
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*/
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priv->eee_enabled = stmmac_eee_init(priv);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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@@ -1250,7 +1251,7 @@ static void stmmac_tx_clean(struct stmmac_priv *priv)
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if ((priv->eee_enabled) && (!priv->tx_path_in_lpi_mode)) {
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stmmac_enable_eee_mode(priv);
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mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_TIMER(eee_timer));
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mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(eee_timer));
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}
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spin_unlock(&priv->tx_lock);
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}
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@@ -1644,14 +1645,9 @@ static int stmmac_open(struct net_device *dev)
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if (priv->phydev)
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phy_start(priv->phydev);
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priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS_TIMER;
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priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS;
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/* Using PCS we cannot dial with the phy registers at this stage
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* so we do not support extra feature like EEE.
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*/
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if (priv->pcs != STMMAC_PCS_RGMII && priv->pcs != STMMAC_PCS_TBI &&
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priv->pcs != STMMAC_PCS_RTBI)
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priv->eee_enabled = stmmac_eee_init(priv);
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priv->eee_enabled = stmmac_eee_init(priv);
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stmmac_init_tx_coalesce(priv);
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