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qed*: Refactor mf_mode to consist of bits.

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`mf_mode' field indicates the multi-partitioning mode the device is
configured to. This method doesn't scale very well, adding a new MF mode
requires going over all the existing conditions, and deciding whether those
are needed for the new mode or not.
The patch defines a set of bit-fields for modes which are derived according
to the mode info shared by the MFW and all the configuration would be made
according to those. To add a new mode, there would be a single place where
we'll need to go and choose which bits apply and which don't.

Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com>
Signed-off-by: Ariel Elior <ariel.elior@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sudarsana Reddy Kalluru
2018-05-05 18:42:59 -07:00
committed by David S. Miller
parent 3a443bd6dd
commit 0bc5fe8572
8 changed files with 71 additions and 46 deletions
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41
drivers/net/ethernet/qlogic/qed/qed.h
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@@ -439,6 +439,41 @@ struct qed_fw_data {
u32 init_ops_size;
};
enum qed_mf_mode_bit {
/* Supports PF-classification based on tag */
QED_MF_OVLAN_CLSS,
/* Supports PF-classification based on MAC */
QED_MF_LLH_MAC_CLSS,
/* Supports PF-classification based on protocol type */
QED_MF_LLH_PROTO_CLSS,
/* Requires a default PF to be set */
QED_MF_NEED_DEF_PF,
/* Allow LL2 to multicast/broadcast */
QED_MF_LL2_NON_UNICAST,
/* Allow Cross-PF [& child VFs] Tx-switching */
QED_MF_INTER_PF_SWITCH,
/* Unified Fabtic Port support enabled */
QED_MF_UFP_SPECIFIC,
/* Disable Accelerated Receive Flow Steering (aRFS) */
QED_MF_DISABLE_ARFS,
/* Use vlan for steering */
QED_MF_8021Q_TAGGING,
/* Use stag for steering */
QED_MF_8021AD_TAGGING,
/* Allow DSCP to TC mapping */
QED_MF_DSCP_TO_TC_MAP,
};
enum BAR_ID {
BAR_ID_0, /* used for GRC */
BAR_ID_1 /* Used for doorbells */
@@ -669,10 +704,8 @@ struct qed_dev {
u8 num_funcs_in_port;
u8 path_id;
enum qed_mf_mode mf_mode;
#define IS_MF_DEFAULT(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_DEFAULT)
#define IS_MF_SI(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_NPAR)
#define IS_MF_SD(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_OVLAN)
unsigned long mf_bits;
int pcie_width;
int pcie_speed;