scsi: mpt3sas: Increased/Additional MSIX support for SAS35 devices.

For SAS35 devices MSIX vectors are inceased to 128 from 96. To support this
Reply post host index register count is increased to 16. Also variable
msix96_vector is replaced with combined_reply_queue and variable
combined_reply_index_count is added to set different values for SAS3 and
SAS35 devices.

Signed-off-by: Chaitra P B <chaitra.basappa@broadcom.com>
Signed-off-by: Sathya Prakash <sathya.prakash@broadcom.com>
Signed-off-by: Suganath Prabu S <suganath-prabu.subramani@broadcom.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Reviewed-by: Tomas Henzl <thenzl@redhat.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Suganath Prabu Subramani
2016-10-26 13:34:38 +05:30
committed by Martin K. Petersen
parent 998f26aedf
commit 0bb337c97c
3 changed files with 21 additions and 12 deletions

View File

@@ -8748,8 +8748,15 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)
}
if ((ioc->hba_mpi_version_belonged == MPI25_VERSION &&
pdev->revision >= SAS3_PCI_DEVICE_C0_REVISION) ||
(ioc->hba_mpi_version_belonged == MPI26_VERSION))
ioc->msix96_vector = 1;
(ioc->hba_mpi_version_belonged == MPI26_VERSION)) {
ioc->combined_reply_queue = 1;
if (ioc->is_gen35_ioc)
ioc->combined_reply_index_count =
MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35;
else
ioc->combined_reply_index_count =
MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3;
}
break;
default:
return -ENODEV;