ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource
The ARM Dual-Timer SP804 module is peripheral found not only on ARM32 platforms but also on ARM64 platforms. This patch moves the driver out of arch/arm to driver/clocksource so that it can be used on ARM64 platforms also. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:

committed by
Russell King

parent
1e5f0519f4
commit
0b7402dce4
@@ -1,35 +0,0 @@
|
||||
#ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H
|
||||
#define __ASM_ARM_HARDWARE_ARM_TIMER_H
|
||||
|
||||
/*
|
||||
* ARM timer implementation, found in Integrator, Versatile and Realview
|
||||
* platforms. Not all platforms support all registers and bits in these
|
||||
* registers, so we mark them with A for Integrator AP, C for Integrator
|
||||
* CP, V for Versatile and R for Realview.
|
||||
*
|
||||
* Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
|
||||
* can have 16-bit or 32-bit selectable via a bit in the control register.
|
||||
*
|
||||
* Every SP804 contains two identical timers.
|
||||
*/
|
||||
#define TIMER_1_BASE 0x00
|
||||
#define TIMER_2_BASE 0x20
|
||||
|
||||
#define TIMER_LOAD 0x00 /* ACVR rw */
|
||||
#define TIMER_VALUE 0x04 /* ACVR ro */
|
||||
#define TIMER_CTRL 0x08 /* ACVR rw */
|
||||
#define TIMER_CTRL_ONESHOT (1 << 0) /* CVR */
|
||||
#define TIMER_CTRL_32BIT (1 << 1) /* CVR */
|
||||
#define TIMER_CTRL_DIV1 (0 << 2) /* ACVR */
|
||||
#define TIMER_CTRL_DIV16 (1 << 2) /* ACVR */
|
||||
#define TIMER_CTRL_DIV256 (2 << 2) /* ACVR */
|
||||
#define TIMER_CTRL_IE (1 << 5) /* VR */
|
||||
#define TIMER_CTRL_PERIODIC (1 << 6) /* ACVR */
|
||||
#define TIMER_CTRL_ENABLE (1 << 7) /* ACVR */
|
||||
|
||||
#define TIMER_INTCLR 0x0c /* ACVR wo */
|
||||
#define TIMER_RIS 0x10 /* CVR ro */
|
||||
#define TIMER_MIS 0x14 /* CVR ro */
|
||||
#define TIMER_BGLOAD 0x18 /* CVR rw */
|
||||
|
||||
#endif
|
@@ -1,24 +0,0 @@
|
||||
struct clk;
|
||||
|
||||
void __sp804_clocksource_and_sched_clock_init(void __iomem *,
|
||||
const char *, struct clk *, int);
|
||||
void __sp804_clockevents_init(void __iomem *, unsigned int,
|
||||
struct clk *, const char *);
|
||||
void sp804_timer_disable(void __iomem *);
|
||||
|
||||
static inline void sp804_clocksource_init(void __iomem *base, const char *name)
|
||||
{
|
||||
__sp804_clocksource_and_sched_clock_init(base, name, NULL, 0);
|
||||
}
|
||||
|
||||
static inline void sp804_clocksource_and_sched_clock_init(void __iomem *base,
|
||||
const char *name)
|
||||
{
|
||||
__sp804_clocksource_and_sched_clock_init(base, name, NULL, 1);
|
||||
}
|
||||
|
||||
static inline void sp804_clockevents_init(void __iomem *base, unsigned int irq, const char *name)
|
||||
{
|
||||
__sp804_clockevents_init(base, irq, NULL, name);
|
||||
|
||||
}
|
Reference in New Issue
Block a user