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Merge remote branch 'anholt/drm-intel-next' into drm-linus

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Pull more Intel changes in, especially one to init the GTT properly
This commit is contained in:
Dave Airlie
2009-12-10 15:44:11 +10:00
parent 7b0a9e8302 4f8d619cc3
commit 0b5e8db639
8 changed files with 34 additions and 29 deletions
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39
drivers/gpu/drm/i915/intel_display.c
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@@ -4584,28 +4584,33 @@ void intel_init_clock_gating(struct drm_device *dev)
struct drm_i915_gem_object *obj_priv;
int ret;
pwrctx = drm_gem_object_alloc(dev, 4096);
if (!pwrctx) {
DRM_DEBUG("failed to alloc power context, RC6 disabled\n");
goto out;
if (dev_priv->pwrctx) {
obj_priv = dev_priv->pwrctx->driver_private;
} else {
pwrctx = drm_gem_object_alloc(dev, 4096);
if (!pwrctx) {
DRM_DEBUG("failed to alloc power context, "
"RC6 disabled\n");
goto out;
}
ret = i915_gem_object_pin(pwrctx, 4096);
if (ret) {
DRM_ERROR("failed to pin power context: %d\n",
ret);
drm_gem_object_unreference(pwrctx);
goto out;
}
i915_gem_object_set_to_gtt_domain(pwrctx, 1);
dev_priv->pwrctx = pwrctx;
obj_priv = pwrctx->driver_private;
}
ret = i915_gem_object_pin(pwrctx, 4096);
if (ret) {
DRM_ERROR("failed to pin power context: %d\n", ret);
drm_gem_object_unreference(pwrctx);
goto out;
}
i915_gem_object_set_to_gtt_domain(pwrctx, 1);
obj_priv = pwrctx->driver_private;
I915_WRITE(PWRCTXA, obj_priv->gtt_offset | PWRCTX_EN);
I915_WRITE(MCHBAR_RENDER_STANDBY,
I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT);
dev_priv->pwrctx = pwrctx;
}
out: