[MIPS] MT: Scheduler support for SMT
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
@@ -62,6 +62,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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);
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seq_printf(m, "shadow register sets\t: %d\n",
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cpu_data[n].srsets);
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seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
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sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
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cpu_has_vce ? "%u" : "not available");
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@@ -22,6 +22,7 @@
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#include <linux/cpumask.h>
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#include <linux/interrupt.h>
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#include <linux/compiler.h>
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#include <linux/smp.h>
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#include <asm/atomic.h>
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#include <asm/cacheflush.h>
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@@ -30,7 +31,6 @@
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#include <asm/system.h>
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#include <asm/hardirq.h>
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#include <asm/mmu_context.h>
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#include <asm/smp.h>
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#include <asm/time.h>
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#include <asm/mipsregs.h>
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#include <asm/mipsmtregs.h>
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@@ -223,6 +223,7 @@ static void __init smp_tc_init(unsigned int tc, unsigned int mvpconf0)
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void __init plat_smp_setup(void)
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{
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unsigned int mvpconf0, ntc, tc, ncpu = 0;
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unsigned int nvpe;
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#ifdef CONFIG_MIPS_MT_FPAFF
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/* If we have an FPU, enroll ourselves in the FPU-full mask */
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@@ -242,6 +243,9 @@ void __init plat_smp_setup(void)
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mvpconf0 = read_c0_mvpconf0();
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ntc = (mvpconf0 & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT;
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nvpe = ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1;
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smp_num_siblings = nvpe;
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/* we'll always have more TC's than VPE's, so loop setting everything
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to a sensible state */
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for (tc = 0; tc <= ntc; tc++) {
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@@ -56,6 +56,34 @@ EXPORT_SYMBOL(cpu_online_map);
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extern void __init calibrate_delay(void);
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extern void cpu_idle(void);
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/* Number of TCs (or siblings in Intel speak) per CPU core */
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int smp_num_siblings = 1;
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EXPORT_SYMBOL(smp_num_siblings);
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/* representing the TCs (or siblings in Intel speak) of each logical CPU */
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cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
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EXPORT_SYMBOL(cpu_sibling_map);
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/* representing cpus for which sibling maps can be computed */
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static cpumask_t cpu_sibling_setup_map;
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static inline void set_cpu_sibling_map(int cpu)
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{
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int i;
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cpu_set(cpu, cpu_sibling_setup_map);
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if (smp_num_siblings > 1) {
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for_each_cpu_mask(i, cpu_sibling_setup_map) {
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if (cpu_data[cpu].core == cpu_data[i].core) {
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cpu_set(i, cpu_sibling_map[cpu]);
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cpu_set(cpu, cpu_sibling_map[i]);
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}
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}
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} else
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cpu_set(cpu, cpu_sibling_map[cpu]);
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}
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/*
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* First C code run on the secondary CPUs after being started up by
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* the master.
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@@ -85,6 +113,7 @@ asmlinkage __cpuinit void start_secondary(void)
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cpu_data[cpu].udelay_val = loops_per_jiffy;
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prom_smp_finish();
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set_cpu_sibling_map(cpu);
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cpu_set(cpu, cpu_callin_map);
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@@ -258,6 +287,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
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init_new_context(current, &init_mm);
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current_thread_info()->cpu = 0;
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plat_prepare_cpus(max_cpus);
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set_cpu_sibling_map(0);
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#ifndef CONFIG_HOTPLUG_CPU
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cpu_present_map = cpu_possible_map;
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#endif
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