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mfd: twl6040: Handle mclk used for HPPLL and optional internal clock source

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On some boards, like omap5-uevm the MCLK is gated by default and in order
to be able to use the High performance modes of twl6040 it need to be
enabled by SW.
Add support for handling the MCLK source clock via CCF.
At the same time lower the print priority of the notification that the 32K
clock is not provided and it is not going to be handled by the driver.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Peter Ujfalusi
2016-06-20 17:07:18 +03:00
committed by Lee Jones
parent 1db3ba2830
commit 0a58da1e2f
3 changed files with 34 additions and 16 deletions
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5
include/linux/mfd/twl6040.h
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@@ -226,6 +226,7 @@ struct twl6040 {
struct regmap_irq_chip_data *irq_data;
struct regulator_bulk_data supplies[2]; /* supplies for vio, v2v1 */
struct clk *clk32k;
struct clk *mclk;
struct mutex mutex;
struct mutex irq_mutex;
struct mfd_cell cells[TWL6040_CELLS];
@@ -237,8 +238,8 @@ struct twl6040 {
/* PLL configuration */
int pll;
unsigned int sysclk;
unsigned int mclk;
unsigned int sysclk_rate;
unsigned int mclk_rate;
unsigned int irq;
unsigned int irq_ready;