fpga: dfl: afu: add AFU interrupt support

AFU (Accelerated Function Unit) is dynamic region of the DFL based FPGA,
and always defined by users. Some DFL based FPGA cards allow users to
implement their own interrupts in AFU. In order to support this,
hardware implements a new UINT (AFU Interrupt) private feature with
related capability register which describes the number of supported
AFU interrupts as well as the local index of the interrupts for
software enumeration, and from software side, driver follows the common
DFL interrupt notification and handling mechanism, and it implements
two ioctls below for user to query number of irqs supported and set/unset
interrupt triggers.

 Ioctls:
 * DFL_FPGA_PORT_UINT_GET_IRQ_NUM
   get the number of irqs, which is used to determine how many interrupts
   UINT feature supports.

 * DFL_FPGA_PORT_UINT_SET_IRQ
   set/unset eventfds as AFU interrupt triggers.

Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com>
Acked-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
This commit is contained in:
Xu Yilun
2020-06-16 12:08:47 +08:00
committed by Moritz Fischer
parent d43f20bae5
commit 09d8615014
2 changed files with 51 additions and 0 deletions

View File

@@ -187,6 +187,29 @@ struct dfl_fpga_irq_set {
DFL_PORT_BASE + 6, \
struct dfl_fpga_irq_set)
/**
* DFL_FPGA_PORT_UINT_GET_IRQ_NUM - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 7,
* __u32 num_irqs)
*
* Get the number of irqs supported by the fpga AFU interrupt private
* feature.
* Return: 0 on success, -errno on failure.
*/
#define DFL_FPGA_PORT_UINT_GET_IRQ_NUM _IOR(DFL_FPGA_MAGIC, \
DFL_PORT_BASE + 7, __u32)
/**
* DFL_FPGA_PORT_UINT_SET_IRQ - _IOW(DFL_FPGA_MAGIC, DFL_PORT_BASE + 8,
* struct dfl_fpga_irq_set)
*
* Set fpga AFU interrupt trigger if evtfds[n] is valid.
* Unset related interrupt trigger if evtfds[n] is a negative value.
* Return: 0 on success, -errno on failure.
*/
#define DFL_FPGA_PORT_UINT_SET_IRQ _IOW(DFL_FPGA_MAGIC, \
DFL_PORT_BASE + 8, \
struct dfl_fpga_irq_set)
/* IOCTLs for FME file descriptor */
/**