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Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

Bläddra i källkod 
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (151 commits)
  powerpc: Fix usage of 64-bit instruction in 32-bit altivec code
  MAINTAINERS: Add PowerPC patterns
  powerpc/pseries: Track previous CPPR values to correctly EOI interrupts
  powerpc/pseries: Correct pseries/dlpar.c build break without CONFIG_SMP
  powerpc: Make "intspec" pointers in irq_host->xlate() const
  powerpc/8xx: DTLB Miss cleanup
  powerpc/8xx: Remove DIRTY pte handling in DTLB Error.
  powerpc/8xx: Start using dcbX instructions in various copy routines
  powerpc/8xx: Restore _PAGE_WRITETHRU
  powerpc/8xx: Add missing Guarded setting in DTLB Error.
  powerpc/8xx: Fixup DAR from buggy dcbX instructions.
  powerpc/8xx: Tag DAR with 0x00f0 to catch buggy instructions.
  powerpc/8xx: Update TLB asm so it behaves as linux mm expects.
  powerpc/8xx: Invalidate non present TLBs
  powerpc/pseries: Serialize cpu hotplug operations during deactivate Vs deallocate
  pseries/pseries: Add code to online/offline CPUs of a DLPAR node
  powerpc: stop_this_cpu: remove the cpu from the online map.
  powerpc/pseries: Add kernel based CPU DLPAR handling
  sysfs/cpu: Add probe/release files
  powerpc/pseries: Kernel DLPAR Infrastructure
  ...
This commit is contained in:
Linus Torvalds
2009-12-12 14:27:24 -08:00
förälder 6eb7365db6 e090aa8032
incheckning 09cea96caa
234 ändrade filer med 13150 tillägg och 2737 borttagningar
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/ata/Kconfig
Visa fil

@@ -790,5 +790,15 @@ config PATA_BF54X
If unsure, say N.
config PATA_MACIO
tristate "Apple PowerMac/PowerBook internal 'MacIO' IDE"
depends on PPC_PMAC
help
Most IDE capable PowerMacs have IDE busses driven by a variant
of this controller which is part of the Apple chipset used on
most PowerMac models. Some models have multiple busses using
different chipsets, though generally, MacIO is one of them.
endif # ATA_SFF
endif # ATA

1
drivers/ata/Makefile
Visa fil

@@ -18,6 +18,7 @@ obj-$(CONFIG_SATA_MV) += sata_mv.o
obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o
obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
obj-$(CONFIG_SATA_FSL) += sata_fsl.o
obj-$(CONFIG_PATA_MACIO) += pata_macio.o
obj-$(CONFIG_PATA_ALI) += pata_ali.o
obj-$(CONFIG_PATA_AMD) += pata_amd.o

1427
drivers/ata/pata_macio.c Normal file
Visa fil

Filskillnaden har hållits tillbaka eftersom den är för stor Load Diff

34
drivers/base/cpu.c
Visa fil

@@ -35,6 +35,7 @@ static ssize_t __ref store_online(struct sys_device *dev, struct sysdev_attribut
struct cpu *cpu = container_of(dev, struct cpu, sysdev);
ssize_t ret;
cpu_hotplug_driver_lock();
switch (buf[0]) {
case '0':
ret = cpu_down(cpu->sysdev.id);
@@ -49,6 +50,7 @@ static ssize_t __ref store_online(struct sys_device *dev, struct sysdev_attribut
default:
ret = -EINVAL;
}
cpu_hotplug_driver_unlock();
if (ret >= 0)
ret = count;
@@ -72,6 +74,38 @@ void unregister_cpu(struct cpu *cpu)
per_cpu(cpu_sys_devices, logical_cpu) = NULL;
return;
}
#ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
static ssize_t cpu_probe_store(struct class *class, const char *buf,
size_t count)
{
return arch_cpu_probe(buf, count);
}
static ssize_t cpu_release_store(struct class *class, const char *buf,
size_t count)
{
return arch_cpu_release(buf, count);
}
static CLASS_ATTR(probe, S_IWUSR, NULL, cpu_probe_store);
static CLASS_ATTR(release, S_IWUSR, NULL, cpu_release_store);
int __init cpu_probe_release_init(void)
{
int rc;
rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
&class_attr_probe.attr);
if (!rc)
rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
&class_attr_release.attr);
return rc;
}
device_initcall(cpu_probe_release_init);
#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
#else /* ... !CONFIG_HOTPLUG_CPU */
static inline void register_cpu_control(struct cpu *cpu)
{

39
drivers/block/swim3.c
Visa fil

@@ -200,7 +200,7 @@ struct floppy_state {
int ejected;
wait_queue_head_t wait;
int wanted;
struct device_node* media_bay; /* NULL when not in bay */
struct macio_dev *mdev;
char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
};
@@ -303,14 +303,13 @@ static int swim3_readbit(struct floppy_state *fs, int bit)
static void do_fd_request(struct request_queue * q)
{
int i;
for(i=0;i<floppy_count;i++)
{
#ifdef CONFIG_PMAC_MEDIABAY
if (floppy_states[i].media_bay &&
check_media_bay(floppy_states[i].media_bay, MB_FD))
for(i=0; i<floppy_count; i++) {
struct floppy_state *fs = &floppy_states[i];
if (fs->mdev->media_bay &&
check_media_bay(fs->mdev->media_bay) != MB_FD)
continue;
#endif /* CONFIG_PMAC_MEDIABAY */
start_request(&floppy_states[i]);
start_request(fs);
}
}
@@ -849,10 +848,9 @@ static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
return -EPERM;
#ifdef CONFIG_PMAC_MEDIABAY
if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
if (fs->mdev->media_bay &&
check_media_bay(fs->mdev->media_bay) != MB_FD)
return -ENXIO;
#endif
switch (cmd) {
case FDEJECT:
@@ -876,10 +874,9 @@ static int floppy_open(struct block_device *bdev, fmode_t mode)
int n, err = 0;
if (fs->ref_count == 0) {
#ifdef CONFIG_PMAC_MEDIABAY
if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
if (fs->mdev->media_bay &&
check_media_bay(fs->mdev->media_bay) != MB_FD)
return -ENXIO;
#endif
out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
out_8(&sw->control_bic, 0xff);
out_8(&sw->mode, 0x95);
@@ -963,10 +960,9 @@ static int floppy_revalidate(struct gendisk *disk)
struct swim3 __iomem *sw;
int ret, n;
#ifdef CONFIG_PMAC_MEDIABAY
if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
if (fs->mdev->media_bay &&
check_media_bay(fs->mdev->media_bay) != MB_FD)
return -ENXIO;
#endif
sw = fs->swim3;
grab_drive(fs, revalidating, 0);
@@ -1009,7 +1005,6 @@ static const struct block_device_operations floppy_fops = {
static int swim3_add_device(struct macio_dev *mdev, int index)
{
struct device_node *swim = mdev->ofdev.node;
struct device_node *mediabay;
struct floppy_state *fs = &floppy_states[index];
int rc = -EBUSY;
@@ -1036,9 +1031,7 @@ static int swim3_add_device(struct macio_dev *mdev, int index)
}
dev_set_drvdata(&mdev->ofdev.dev, fs);
mediabay = (strcasecmp(swim->parent->type, "media-bay") == 0) ?
swim->parent : NULL;
if (mediabay == NULL)
if (mdev->media_bay == NULL)
pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
memset(fs, 0, sizeof(*fs));
@@ -1068,7 +1061,7 @@ static int swim3_add_device(struct macio_dev *mdev, int index)
fs->secpercyl = 36;
fs->secpertrack = 18;
fs->total_secs = 2880;
fs->media_bay = mediabay;
fs->mdev = mdev;
init_waitqueue_head(&fs->wait);
fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
@@ -1093,7 +1086,7 @@ static int swim3_add_device(struct macio_dev *mdev, int index)
init_timer(&fs->timeout);
printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
mediabay ? "in media bay" : "");
mdev->media_bay ? "in media bay" : "");
return 0;

81
drivers/char/agp/uninorth-agp.c
Visa fil

@@ -144,59 +144,13 @@ static int uninorth_configure(void)
return 0;
}
static int uninorth_insert_memory(struct agp_memory *mem, off_t pg_start,
int type)
{
int i, j, num_entries;
void *temp;
int mask_type;
temp = agp_bridge->current_size;
num_entries = A_SIZE_32(temp)->num_entries;
if (type != mem->type)
return -EINVAL;
mask_type = agp_bridge->driver->agp_type_to_mask_type(agp_bridge, type);
if (mask_type != 0) {
/* We know nothing of memory types */
return -EINVAL;
}
if ((pg_start + mem->page_count) > num_entries)
return -EINVAL;
j = pg_start;
while (j < (pg_start + mem->page_count)) {
if (agp_bridge->gatt_table[j])
return -EBUSY;
j++;
}
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
agp_bridge->gatt_table[j] =
cpu_to_le32((page_to_phys(mem->pages[i]) & 0xFFFFF000UL) | 0x1UL);
flush_dcache_range((unsigned long)__va(page_to_phys(mem->pages[i])),
(unsigned long)__va(page_to_phys(mem->pages[i]))+0x1000);
}
(void)in_le32((volatile u32*)&agp_bridge->gatt_table[pg_start]);
mb();
uninorth_tlbflush(mem);
return 0;
}
static int u3_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
static int uninorth_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
{
int i, num_entries;
void *temp;
u32 *gp;
int mask_type;
temp = agp_bridge->current_size;
num_entries = A_SIZE_32(temp)->num_entries;
if (type != mem->type)
return -EINVAL;
@@ -206,6 +160,12 @@ static int u3_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
return -EINVAL;
}
if (mem->page_count == 0)
return 0;
temp = agp_bridge->current_size;
num_entries = A_SIZE_32(temp)->num_entries;
if ((pg_start + mem->page_count) > num_entries)
return -EINVAL;
@@ -213,14 +173,18 @@ static int u3_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
for (i = 0; i < mem->page_count; ++i) {
if (gp[i]) {
dev_info(&agp_bridge->dev->dev,
"u3_insert_memory: entry 0x%x occupied (%x)\n",
"uninorth_insert_memory: entry 0x%x occupied (%x)\n",
i, gp[i]);
return -EBUSY;
}
}
for (i = 0; i < mem->page_count; i++) {
gp[i] = (page_to_phys(mem->pages[i]) >> PAGE_SHIFT) | 0x80000000UL;
if (is_u3)
gp[i] = (page_to_phys(mem->pages[i]) >> PAGE_SHIFT) | 0x80000000UL;
else
gp[i] = cpu_to_le32((page_to_phys(mem->pages[i]) & 0xFFFFF000UL) |
0x1UL);
flush_dcache_range((unsigned long)__va(page_to_phys(mem->pages[i])),
(unsigned long)__va(page_to_phys(mem->pages[i]))+0x1000);
}
@@ -230,14 +194,23 @@ static int u3_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
return 0;
}
int u3_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
int uninorth_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
{
size_t i;
u32 *gp;
int mask_type;
if (type != 0 || mem->type != 0)
if (type != mem->type)
return -EINVAL;
mask_type = agp_bridge->driver->agp_type_to_mask_type(agp_bridge, type);
if (mask_type != 0) {
/* We know nothing of memory types */
return -EINVAL;
}
if (mem->page_count == 0)
return 0;
gp = (u32 *) &agp_bridge->gatt_table[pg_start];
for (i = 0; i < mem->page_count; ++i)
@@ -536,7 +509,7 @@ const struct agp_bridge_driver uninorth_agp_driver = {
.create_gatt_table = uninorth_create_gatt_table,
.free_gatt_table = uninorth_free_gatt_table,
.insert_memory = uninorth_insert_memory,
.remove_memory = agp_generic_remove_memory,
.remove_memory = uninorth_remove_memory,
.alloc_by_type = agp_generic_alloc_by_type,
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
@@ -562,8 +535,8 @@ const struct agp_bridge_driver u3_agp_driver = {
.agp_enable = uninorth_agp_enable,
.create_gatt_table = uninorth_create_gatt_table,
.free_gatt_table = uninorth_free_gatt_table,
.insert_memory = u3_insert_memory,
.remove_memory = u3_remove_memory,
.insert_memory = uninorth_insert_memory,
.remove_memory = uninorth_remove_memory,
.alloc_by_type = agp_generic_alloc_by_type,
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,

1
drivers/char/hvc_console.c
Visa fil

@@ -832,6 +832,7 @@ int hvc_remove(struct hvc_struct *hp)
tty_hangup(tty);
return 0;
}
EXPORT_SYMBOL_GPL(hvc_remove);
/* Driver initialization: called as soon as someone uses hvc_alloc(). */
static int hvc_init(void)

94
drivers/ide/pmac.c
Visa fil

@@ -43,10 +43,7 @@
#include <asm/pmac_feature.h>
#include <asm/sections.h>
#include <asm/irq.h>
#ifndef CONFIG_PPC64
#include <asm/mediabay.h>
#endif
#define DRV_NAME "ide-pmac"
@@ -59,13 +56,14 @@ typedef struct pmac_ide_hwif {
int irq;
int kind;
int aapl_bus_id;
unsigned mediabay : 1;
unsigned broken_dma : 1;
unsigned broken_dma_warn : 1;
struct device_node* node;
struct macio_dev *mdev;
u32 timings[4];
volatile u32 __iomem * *kauai_fcr;
ide_hwif_t *hwif;
/* Those fields are duplicating what is in hwif. We currently
* can't use the hwif ones because of some assumptions that are
* beeing done by the generic code about the kind of dma controller
@@ -854,6 +852,11 @@ sanitize_timings(pmac_ide_hwif_t *pmif)
pmif->timings[2] = pmif->timings[3] = value2;
}
static int on_media_bay(pmac_ide_hwif_t *pmif)
{
return pmif->mdev && pmif->mdev->media_bay != NULL;
}
/* Suspend call back, should be called after the child devices
* have actually been suspended
*/
@@ -866,7 +869,7 @@ static int pmac_ide_do_suspend(pmac_ide_hwif_t *pmif)
disable_irq(pmif->irq);
/* The media bay will handle itself just fine */
if (pmif->mediabay)
if (on_media_bay(pmif))
return 0;
/* Kauai has bus control FCRs directly here */
@@ -889,7 +892,7 @@ static int pmac_ide_do_suspend(pmac_ide_hwif_t *pmif)
static int pmac_ide_do_resume(pmac_ide_hwif_t *pmif)
{
/* Hard reset & re-enable controller (do we really need to reset ? -BenH) */
if (!pmif->mediabay) {
if (!on_media_bay(pmif)) {
ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 1);
ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id, 1);
msleep(10);
@@ -950,13 +953,11 @@ static void pmac_ide_init_dev(ide_drive_t *drive)
pmac_ide_hwif_t *pmif =
(pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
if (pmif->mediabay) {
#ifdef CONFIG_PMAC_MEDIABAY
if (check_media_bay_by_base(pmif->regbase, MB_CD) == 0) {
if (on_media_bay(pmif)) {
if (check_media_bay(pmif->mdev->media_bay) == MB_CD) {
drive->dev_flags &= ~IDE_DFLAG_NOPROBE;
return;
}
#endif
drive->dev_flags |= IDE_DFLAG_NOPROBE;
}
}
@@ -1072,26 +1073,23 @@ static int __devinit pmac_ide_setup_device(pmac_ide_hwif_t *pmif,
writel(KAUAI_FCR_UATA_MAGIC |
KAUAI_FCR_UATA_RESET_N |
KAUAI_FCR_UATA_ENABLE, pmif->kauai_fcr);
pmif->mediabay = 0;
/* Make sure we have sane timings */
sanitize_timings(pmif);
host = ide_host_alloc(&d, hws, 1);
if (host == NULL)
return -ENOMEM;
hwif = host->ports[0];
/* If we are on a media bay, wait for it to settle and lock it */
if (pmif->mdev)
lock_media_bay(pmif->mdev->media_bay);
#ifndef CONFIG_PPC64
/* XXX FIXME: Media bay stuff need re-organizing */
if (np->parent && np->parent->name
&& strcasecmp(np->parent->name, "media-bay") == 0) {
#ifdef CONFIG_PMAC_MEDIABAY
media_bay_set_ide_infos(np->parent, pmif->regbase, pmif->irq,
hwif);
#endif /* CONFIG_PMAC_MEDIABAY */
pmif->mediabay = 1;
host = ide_host_alloc(&d, hws, 1);
if (host == NULL) {
rc = -ENOMEM;
goto bail;
}
hwif = pmif->hwif = host->ports[0];
if (on_media_bay(pmif)) {
/* Fixup bus ID for media bay */
if (!bidp)
pmif->aapl_bus_id = 1;
} else if (pmif->kind == controller_ohare) {
@@ -1100,9 +1098,7 @@ static int __devinit pmac_ide_setup_device(pmac_ide_hwif_t *pmif,
* units, I keep the old way
*/
ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, 0, 1);
} else
#endif
{
} else {
/* This is necessary to enable IDE when net-booting */
ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 1);
ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, pmif->aapl_bus_id, 1);
@@ -1112,17 +1108,21 @@ static int __devinit pmac_ide_setup_device(pmac_ide_hwif_t *pmif,
}
printk(KERN_INFO DRV_NAME ": Found Apple %s controller (%s), "
"bus ID %d%s, irq %d\n", model_name[pmif->kind],
pmif->mdev ? "macio" : "PCI", pmif->aapl_bus_id,
pmif->mediabay ? " (mediabay)" : "", hw->irq);
"bus ID %d%s, irq %d\n", model_name[pmif->kind],
pmif->mdev ? "macio" : "PCI", pmif->aapl_bus_id,
on_media_bay(pmif) ? " (mediabay)" : "", hw->irq);
rc = ide_host_register(host, &d, hws);
if (rc) {
ide_host_free(host);
return rc;
}
if (rc)
pmif->hwif = NULL;
return 0;
if (pmif->mdev)
unlock_media_bay(pmif->mdev->media_bay);
bail:
if (rc && host)
ide_host_free(host);
return rc;
}
static void __devinit pmac_ide_init_ports(struct ide_hw *hw, unsigned long base)
@@ -1362,6 +1362,25 @@ pmac_ide_pci_resume(struct pci_dev *pdev)
return rc;
}
#ifdef CONFIG_PMAC_MEDIABAY
static void pmac_ide_macio_mb_event(struct macio_dev* mdev, int mb_state)
{
pmac_ide_hwif_t *pmif =
(pmac_ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev);
switch(mb_state) {
case MB_CD:
if (!pmif->hwif->present)
ide_port_scan(pmif->hwif);
break;
default:
if (pmif->hwif->present)
ide_port_unregister_devices(pmif->hwif);
}
}
#endif /* CONFIG_PMAC_MEDIABAY */
static struct of_device_id pmac_ide_macio_match[] =
{
{
@@ -1386,6 +1405,9 @@ static struct macio_driver pmac_ide_macio_driver =
.probe = pmac_ide_macio_attach,
.suspend = pmac_ide_macio_suspend,
.resume = pmac_ide_macio_resume,
#ifdef CONFIG_PMAC_MEDIABAY
.mediabay_event = pmac_ide_macio_mb_event,
#endif
};
static const struct pci_device_id pmac_ide_pci_match[] = {

52
drivers/macintosh/macio_asic.c
Visa fil

@@ -379,6 +379,11 @@ static struct macio_dev * macio_add_one_device(struct macio_chip *chip,
dev->ofdev.dev.parent = parent;
dev->ofdev.dev.bus = &macio_bus_type;
dev->ofdev.dev.release = macio_release_dev;
dev->ofdev.dev.dma_parms = &dev->dma_parms;
/* Standard DMA paremeters */
dma_set_max_seg_size(&dev->ofdev.dev, 65536);
dma_set_seg_boundary(&dev->ofdev.dev, 0xffffffff);
#ifdef CONFIG_PCI
/* Set the DMA ops to the ones from the PCI device, this could be
@@ -538,6 +543,42 @@ void macio_unregister_driver(struct macio_driver *drv)
driver_unregister(&drv->driver);
}
/* Managed MacIO resources */
struct macio_devres {
u32 res_mask;
};
static void maciom_release(struct device *gendev, void *res)
{
struct macio_dev *dev = to_macio_device(gendev);
struct macio_devres *dr = res;
int i, max;
max = min(dev->n_resources, 32);
for (i = 0; i < max; i++) {
if (dr->res_mask & (1 << i))
macio_release_resource(dev, i);
}
}
int macio_enable_devres(struct macio_dev *dev)
{
struct macio_devres *dr;
dr = devres_find(&dev->ofdev.dev, maciom_release, NULL, NULL);
if (!dr) {
dr = devres_alloc(maciom_release, sizeof(*dr), GFP_KERNEL);
if (!dr)
return -ENOMEM;
}
return devres_get(&dev->ofdev.dev, dr, NULL, NULL) != NULL;
}
static struct macio_devres * find_macio_dr(struct macio_dev *dev)
{
return devres_find(&dev->ofdev.dev, maciom_release, NULL, NULL);
}
/**
* macio_request_resource - Request an MMIO resource
* @dev: pointer to the device holding the resource
@@ -555,6 +596,8 @@ void macio_unregister_driver(struct macio_driver *drv)
int macio_request_resource(struct macio_dev *dev, int resource_no,
const char *name)
{
struct macio_devres *dr = find_macio_dr(dev);
if (macio_resource_len(dev, resource_no) == 0)
return 0;
@@ -562,6 +605,9 @@ int macio_request_resource(struct macio_dev *dev, int resource_no,
macio_resource_len(dev, resource_no),
name))
goto err_out;
if (dr && resource_no < 32)
dr->res_mask |= 1 << resource_no;
return 0;
@@ -582,10 +628,14 @@ err_out:
*/
void macio_release_resource(struct macio_dev *dev, int resource_no)
{
struct macio_devres *dr = find_macio_dr(dev);
if (macio_resource_len(dev, resource_no) == 0)
return;
release_mem_region(macio_resource_start(dev, resource_no),
macio_resource_len(dev, resource_no));
if (dr && resource_no < 32)
dr->res_mask &= ~(1 << resource_no);
}
/**
@@ -744,3 +794,5 @@ EXPORT_SYMBOL(macio_request_resource);
EXPORT_SYMBOL(macio_release_resource);
EXPORT_SYMBOL(macio_request_resources);
EXPORT_SYMBOL(macio_release_resources);
EXPORT_SYMBOL(macio_enable_devres);

330
drivers/macintosh/mediabay.c
Visa fil

@@ -33,15 +33,6 @@
#include <linux/adb.h>
#include <linux/pmu.h>
#define MB_DEBUG
#ifdef MB_DEBUG
#define MBDBG(fmt, arg...) printk(KERN_INFO fmt , ## arg)
#else
#define MBDBG(fmt, arg...) do { } while (0)
#endif
#define MB_FCR32(bay, r) ((bay)->base + ((r) >> 2))
#define MB_FCR8(bay, r) (((volatile u8 __iomem *)((bay)->base)) + (r))
@@ -76,28 +67,14 @@ struct media_bay_info {
int index;
int cached_gpio;
int sleeping;
int user_lock;
struct mutex lock;
#ifdef CONFIG_BLK_DEV_IDE_PMAC
ide_hwif_t *cd_port;
void __iomem *cd_base;
int cd_irq;
int cd_retry;
#endif
#if defined(CONFIG_BLK_DEV_IDE_PMAC)
int cd_index;
#endif
};
#define MAX_BAYS 2
static struct media_bay_info media_bays[MAX_BAYS];
int media_bay_count = 0;
#ifdef CONFIG_BLK_DEV_IDE_PMAC
/* check the busy bit in the media-bay ide interface
(assumes the media-bay contains an ide device) */
#define MB_IDE_READY(i) ((readb(media_bays[i].cd_base + 0x70) & 0x80) == 0)
#endif
static int media_bay_count = 0;
/*
* Wait that number of ms between each step in normal polling mode
@@ -130,20 +107,10 @@ int media_bay_count = 0;
/*
* Wait this many ticks after an IDE device (e.g. CD-ROM) is inserted
* (or until the device is ready) before waiting for busy bit to disappear
* (or until the device is ready) before calling into the driver
*/
#define MB_IDE_WAIT 1000
/*
* Timeout waiting for busy bit of an IDE device to go down
*/
#define MB_IDE_TIMEOUT 5000
/*
* Max retries of the full power up/down sequence for an IDE device
*/
#define MAX_CD_RETRIES 3
/*
* States of a media bay
*/
@@ -153,7 +120,6 @@ enum {
mb_enabling_bay, /* enable bits set, waiting MB_RESET_DELAY */
mb_resetting, /* reset bit unset, waiting MB_SETUP_DELAY */
mb_ide_resetting, /* IDE reset bit unser, waiting MB_IDE_WAIT */
mb_ide_waiting, /* Waiting for BUSY bit to go away until MB_IDE_TIMEOUT */
mb_up, /* Media bay full */
mb_powering_down /* Powering down (avoid too fast down/up) */
};
@@ -373,12 +339,12 @@ static inline void set_mb_power(struct media_bay_info* bay, int onoff)
if (onoff) {
bay->ops->power(bay, 1);
bay->state = mb_powering_up;
MBDBG("mediabay%d: powering up\n", bay->index);
pr_debug("mediabay%d: powering up\n", bay->index);
} else {
/* Make sure everything is powered down & disabled */
bay->ops->power(bay, 0);
bay->state = mb_powering_down;
MBDBG("mediabay%d: powering down\n", bay->index);
pr_debug("mediabay%d: powering down\n", bay->index);
}
bay->timer = msecs_to_jiffies(MB_POWER_DELAY);
}
@@ -387,107 +353,118 @@ static void poll_media_bay(struct media_bay_info* bay)
{
int id = bay->ops->content(bay);
if (id == bay->last_value) {
if (id != bay->content_id) {
bay->value_count += msecs_to_jiffies(MB_POLL_DELAY);
if (bay->value_count >= msecs_to_jiffies(MB_STABLE_DELAY)) {
/* If the device type changes without going thru
* "MB_NO", we force a pass by "MB_NO" to make sure
* things are properly reset
*/
if ((id != MB_NO) && (bay->content_id != MB_NO)) {
id = MB_NO;
MBDBG("mediabay%d: forcing MB_NO\n", bay->index);
}
MBDBG("mediabay%d: switching to %d\n", bay->index, id);
set_mb_power(bay, id != MB_NO);
bay->content_id = id;
if (id == MB_NO) {
#ifdef CONFIG_BLK_DEV_IDE_PMAC
bay->cd_retry = 0;
#endif
printk(KERN_INFO "media bay %d is empty\n", bay->index);
}
}
}
} else {
static char *mb_content_types[] = {
"a floppy drive",
"a floppy drive",
"an unsuported audio device",
"an ATA device",
"an unsupported PCI device",
"an unknown device",
};
if (id != bay->last_value) {
bay->last_value = id;
bay->value_count = 0;
return;
}
if (id == bay->content_id)
return;
bay->value_count += msecs_to_jiffies(MB_POLL_DELAY);
if (bay->value_count >= msecs_to_jiffies(MB_STABLE_DELAY)) {
/* If the device type changes without going thru
* "MB_NO", we force a pass by "MB_NO" to make sure
* things are properly reset
*/
if ((id != MB_NO) && (bay->content_id != MB_NO)) {
id = MB_NO;
pr_debug("mediabay%d: forcing MB_NO\n", bay->index);
}
pr_debug("mediabay%d: switching to %d\n", bay->index, id);
set_mb_power(bay, id != MB_NO);
bay->content_id = id;
if (id >= MB_NO || id < 0)
printk(KERN_INFO "mediabay%d: Bay is now empty\n", bay->index);
else
printk(KERN_INFO "mediabay%d: Bay contains %s\n",
bay->index, mb_content_types[id]);
}
}
#ifdef CONFIG_BLK_DEV_IDE_PMAC
int check_media_bay(struct device_node *which_bay, int what)
int check_media_bay(struct macio_dev *baydev)
{
int i;
struct media_bay_info* bay;
int id;
for (i=0; i<media_bay_count; i++)
if (media_bays[i].mdev && which_bay == media_bays[i].mdev->ofdev.node) {
if ((what == media_bays[i].content_id) && media_bays[i].state == mb_up)
return 0;
media_bays[i].cd_index = -1;
return -EINVAL;
}
return -ENODEV;
if (baydev == NULL)
return MB_NO;
/* This returns an instant snapshot, not locking, sine
* we may be called with the bay lock held. The resulting
* fuzzyness of the result if called at the wrong time is
* not actually a huge deal
*/
bay = macio_get_drvdata(baydev);
if (bay == NULL)
return MB_NO;
id = bay->content_id;
if (bay->state != mb_up)
return MB_NO;
if (id == MB_FD1)
return MB_FD;
return id;
}
EXPORT_SYMBOL(check_media_bay);
EXPORT_SYMBOL_GPL(check_media_bay);
int check_media_bay_by_base(unsigned long base, int what)
void lock_media_bay(struct macio_dev *baydev)
{
int i;
struct media_bay_info* bay;
for (i=0; i<media_bay_count; i++)
if (media_bays[i].mdev && base == (unsigned long) media_bays[i].cd_base) {
if ((what == media_bays[i].content_id) && media_bays[i].state == mb_up)
return 0;
media_bays[i].cd_index = -1;
return -EINVAL;
}
return -ENODEV;
if (baydev == NULL)
return;
bay = macio_get_drvdata(baydev);
if (bay == NULL)
return;
mutex_lock(&bay->lock);
bay->user_lock = 1;
}
EXPORT_SYMBOL_GPL(check_media_bay_by_base);
EXPORT_SYMBOL_GPL(lock_media_bay);
int media_bay_set_ide_infos(struct device_node* which_bay, unsigned long base,
int irq, ide_hwif_t *hwif)
void unlock_media_bay(struct macio_dev *baydev)
{
int i;
struct media_bay_info* bay;
for (i=0; i<media_bay_count; i++) {
struct media_bay_info* bay = &media_bays[i];
if (bay->mdev && which_bay == bay->mdev->ofdev.node) {
int timeout = 5000, index = hwif->index;
mutex_lock(&bay->lock);
bay->cd_port = hwif;
bay->cd_base = (void __iomem *) base;
bay->cd_irq = irq;
if ((MB_CD != bay->content_id) || bay->state != mb_up) {
mutex_unlock(&bay->lock);
return 0;
}
printk(KERN_DEBUG "Registered ide%d for media bay %d\n", index, i);
do {
if (MB_IDE_READY(i)) {
bay->cd_index = index;
mutex_unlock(&bay->lock);
return 0;
}
mdelay(1);
} while(--timeout);
printk(KERN_DEBUG "Timeount waiting IDE in bay %d\n", i);
mutex_unlock(&bay->lock);
return -ENODEV;
}
if (baydev == NULL)
return;
bay = macio_get_drvdata(baydev);
if (bay == NULL)
return;
if (bay->user_lock) {
bay->user_lock = 0;
mutex_unlock(&bay->lock);
}
return -ENODEV;
}
EXPORT_SYMBOL_GPL(media_bay_set_ide_infos);
#endif /* CONFIG_BLK_DEV_IDE_PMAC */
EXPORT_SYMBOL_GPL(unlock_media_bay);
static int mb_broadcast_hotplug(struct device *dev, void *data)
{
struct media_bay_info* bay = data;
struct macio_dev *mdev;
struct macio_driver *drv;
int state;
if (dev->bus != &macio_bus_type)
return 0;
state = bay->state == mb_up ? bay->content_id : MB_NO;
if (state == MB_FD1)
state = MB_FD;
mdev = to_macio_device(dev);
drv = to_macio_driver(dev->driver);
if (dev->driver && drv->mediabay_event)
drv->mediabay_event(mdev, state);
return 0;
}
static void media_bay_step(int i)
{
@@ -497,8 +474,8 @@ static void media_bay_step(int i)
if (bay->state != mb_powering_down)
poll_media_bay(bay);
/* If timer expired or polling IDE busy, run state machine */
if ((bay->state != mb_ide_waiting) && (bay->timer != 0)) {
/* If timer expired run state machine */
if (bay->timer != 0) {
bay->timer -= msecs_to_jiffies(MB_POLL_DELAY);
if (bay->timer > 0)
return;
@@ -508,100 +485,50 @@ static void media_bay_step(int i)
switch(bay->state) {
case mb_powering_up:
if (bay->ops->setup_bus(bay, bay->last_value) < 0) {
MBDBG("mediabay%d: device not supported (kind:%d)\n", i, bay->content_id);
pr_debug("mediabay%d: device not supported (kind:%d)\n",
i, bay->content_id);
set_mb_power(bay, 0);
break;
}
bay->timer = msecs_to_jiffies(MB_RESET_DELAY);
bay->state = mb_enabling_bay;
MBDBG("mediabay%d: enabling (kind:%d)\n", i, bay->content_id);
pr_debug("mediabay%d: enabling (kind:%d)\n", i, bay->content_id);
break;
case mb_enabling_bay:
bay->ops->un_reset(bay);
bay->timer = msecs_to_jiffies(MB_SETUP_DELAY);
bay->state = mb_resetting;
MBDBG("mediabay%d: waiting reset (kind:%d)\n", i, bay->content_id);
pr_debug("mediabay%d: releasing bay reset (kind:%d)\n",
i, bay->content_id);
break;
case mb_resetting:
if (bay->content_id != MB_CD) {
MBDBG("mediabay%d: bay is up (kind:%d)\n", i, bay->content_id);
pr_debug("mediabay%d: bay is up (kind:%d)\n", i,
bay->content_id);
bay->state = mb_up;
device_for_each_child(&bay->mdev->ofdev.dev,
bay, mb_broadcast_hotplug);
break;
}
#ifdef CONFIG_BLK_DEV_IDE_PMAC
MBDBG("mediabay%d: waiting IDE reset (kind:%d)\n", i, bay->content_id);
pr_debug("mediabay%d: releasing ATA reset (kind:%d)\n",
i, bay->content_id);
bay->ops->un_reset_ide(bay);
bay->timer = msecs_to_jiffies(MB_IDE_WAIT);
bay->state = mb_ide_resetting;
#else
printk(KERN_DEBUG "media-bay %d is ide (not compiled in kernel)\n", i);
set_mb_power(bay, 0);
#endif /* CONFIG_BLK_DEV_IDE_PMAC */
break;
#ifdef CONFIG_BLK_DEV_IDE_PMAC
case mb_ide_resetting:
bay->timer = msecs_to_jiffies(MB_IDE_TIMEOUT);
bay->state = mb_ide_waiting;
MBDBG("mediabay%d: waiting IDE ready (kind:%d)\n", i, bay->content_id);
pr_debug("mediabay%d: bay is up (kind:%d)\n", i, bay->content_id);
bay->state = mb_up;
device_for_each_child(&bay->mdev->ofdev.dev,
bay, mb_broadcast_hotplug);
break;
case mb_ide_waiting:
if (bay->cd_base == NULL) {
bay->timer = 0;
bay->state = mb_up;
MBDBG("mediabay%d: up before IDE init\n", i);
break;
} else if (MB_IDE_READY(i)) {
bay->timer = 0;
bay->state = mb_up;
if (bay->cd_index < 0) {
printk("mediabay %d, registering IDE...\n", i);
pmu_suspend();
ide_port_scan(bay->cd_port);
if (bay->cd_port->present)
bay->cd_index = bay->cd_port->index;
pmu_resume();
}
if (bay->cd_index == -1) {
/* We eventually do a retry */
bay->cd_retry++;
printk("IDE register error\n");
set_mb_power(bay, 0);
} else {
printk(KERN_DEBUG "media-bay %d is ide%d\n", i, bay->cd_index);
MBDBG("mediabay %d IDE ready\n", i);
}
break;
} else if (bay->timer > 0)
bay->timer -= msecs_to_jiffies(MB_POLL_DELAY);
if (bay->timer <= 0) {
printk("\nIDE Timeout in bay %d !, IDE state is: 0x%02x\n",
i, readb(bay->cd_base + 0x70));
MBDBG("mediabay%d: nIDE Timeout !\n", i);
set_mb_power(bay, 0);
bay->timer = 0;
}
break;
#endif /* CONFIG_BLK_DEV_IDE_PMAC */
case mb_powering_down:
bay->state = mb_empty;
#ifdef CONFIG_BLK_DEV_IDE_PMAC
if (bay->cd_index >= 0) {
printk(KERN_DEBUG "Unregistering mb %d ide, index:%d\n", i,
bay->cd_index);
ide_port_unregister_devices(bay->cd_port);
bay->cd_index = -1;
}
if (bay->cd_retry) {
if (bay->cd_retry > MAX_CD_RETRIES) {
/* Should add an error sound (sort of beep in dmasound) */
printk("\nmedia-bay %d, IDE device badly inserted or unrecognised\n", i);
} else {
/* Force a new power down/up sequence */
bay->content_id = MB_NO;
}
}
#endif /* CONFIG_BLK_DEV_IDE_PMAC */
MBDBG("mediabay%d: end of power down\n", i);
device_for_each_child(&bay->mdev->ofdev.dev,
bay, mb_broadcast_hotplug);
pr_debug("mediabay%d: end of power down\n", i);
break;
}
}
@@ -676,11 +603,6 @@ static int __devinit media_bay_attach(struct macio_dev *mdev, const struct of_de
bay->last_value = bay->ops->content(bay);
bay->value_count = msecs_to_jiffies(MB_STABLE_DELAY);
bay->state = mb_empty;
do {
msleep(MB_POLL_DELAY);
media_bay_step(i);
} while((bay->state != mb_empty) &&
(bay->state != mb_up));
/* Mark us ready by filling our mdev data */
macio_set_drvdata(mdev, bay);
@@ -725,7 +647,7 @@ static int media_bay_resume(struct macio_dev *mdev)
set_mb_power(bay, 0);
msleep(MB_POWER_DELAY);
if (bay->ops->content(bay) != bay->content_id) {
printk("mediabay%d: content changed during sleep...\n", bay->index);
printk("mediabay%d: Content changed during sleep...\n", bay->index);
mutex_unlock(&bay->lock);
return 0;
}
@@ -733,9 +655,6 @@ static int media_bay_resume(struct macio_dev *mdev)
bay->last_value = bay->content_id;
bay->value_count = msecs_to_jiffies(MB_STABLE_DELAY);
bay->timer = msecs_to_jiffies(MB_POWER_DELAY);
#ifdef CONFIG_BLK_DEV_IDE_PMAC
bay->cd_retry = 0;
#endif
do {
msleep(MB_POLL_DELAY);
media_bay_step(bay->index);
@@ -823,9 +742,6 @@ static int __init media_bay_init(void)
for (i=0; i<MAX_BAYS; i++) {
memset((char *)&media_bays[i], 0, sizeof(struct media_bay_info));
media_bays[i].content_id = -1;
#ifdef CONFIG_BLK_DEV_IDE_PMAC
media_bays[i].cd_index = -1;
#endif
}
if (!machine_is(powermac))
return 0;

11
drivers/macintosh/nvram.c
Visa fil

@@ -13,7 +13,6 @@
#include <linux/fcntl.h>
#include <linux/nvram.h>
#include <linux/init.h>
#include <linux/smp_lock.h>
#include <asm/uaccess.h>
#include <asm/nvram.h>
@@ -21,7 +20,6 @@
static loff_t nvram_llseek(struct file *file, loff_t offset, int origin)
{
lock_kernel();
switch (origin) {
case 1:
offset += file->f_pos;
@@ -30,12 +28,10 @@ static loff_t nvram_llseek(struct file *file, loff_t offset, int origin)
offset += NVRAM_SIZE;
break;
}
if (offset < 0) {
unlock_kernel();
if (offset < 0)
return -EINVAL;
}
file->f_pos = offset;
unlock_kernel();
return file->f_pos;
}
@@ -76,8 +72,7 @@ static ssize_t write_nvram(struct file *file, const char __user *buf,
return p - buf;
}
static int nvram_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg)
static long nvram_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
switch(cmd) {
case PMAC_NVRAM_GET_OFFSET:

15
drivers/macintosh/therm_adt746x.c
Visa fil

@@ -79,6 +79,7 @@ struct thermostat {
u8 limits[3];
int last_speed[2];
int last_var[2];
int pwm_inv[2];
};
static enum {ADT7460, ADT7467} therm_type;
@@ -229,19 +230,23 @@ static void write_fan_speed(struct thermostat *th, int speed, int fan)
if (speed >= 0) {
manual = read_reg(th, MANUAL_MODE[fan]);
manual &= ~INVERT_MASK;
write_reg(th, MANUAL_MODE[fan],
(manual|MANUAL_MASK) & (~INVERT_MASK));
manual | MANUAL_MASK | th->pwm_inv[fan]);
write_reg(th, FAN_SPD_SET[fan], speed);
} else {
/* back to automatic */
if(therm_type == ADT7460) {
manual = read_reg(th,
MANUAL_MODE[fan]) & (~MANUAL_MASK);
manual &= ~INVERT_MASK;
manual |= th->pwm_inv[fan];
write_reg(th,
MANUAL_MODE[fan], manual|REM_CONTROL[fan]);
} else {
manual = read_reg(th, MANUAL_MODE[fan]);
manual &= ~INVERT_MASK;
manual |= th->pwm_inv[fan];
write_reg(th, MANUAL_MODE[fan], manual&(~AUTO_MASK));
}
}
@@ -387,7 +392,7 @@ static int probe_thermostat(struct i2c_client *client,
i2c_set_clientdata(client, th);
th->clt = client;
rc = read_reg(th, 0);
rc = read_reg(th, CONFIG_REG);
if (rc < 0) {
dev_err(&client->dev, "Thermostat failed to read config!\n");
kfree(th);
@@ -418,6 +423,10 @@ static int probe_thermostat(struct i2c_client *client,
thermostat = th;
/* record invert bit status because fw can corrupt it after suspend */
th->pwm_inv[0] = read_reg(th, MANUAL_MODE[0]) & INVERT_MASK;
th->pwm_inv[1] = read_reg(th, MANUAL_MODE[1]) & INVERT_MASK;
/* be sure to really write fan speed the first time */
th->last_speed[0] = -2;
th->last_speed[1] = -2;

160
drivers/macintosh/via-pmu.c
Visa fil

@@ -36,6 +36,7 @@
#include <linux/spinlock.h>
#include <linux/pm.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/device.h>
@@ -186,17 +187,11 @@ static int init_pmu(void);
static void pmu_start(void);
static irqreturn_t via_pmu_interrupt(int irq, void *arg);
static irqreturn_t gpio1_interrupt(int irq, void *arg);
static int proc_get_info(char *page, char **start, off_t off,
int count, int *eof, void *data);
static int proc_get_irqstats(char *page, char **start, off_t off,
int count, int *eof, void *data);
static const struct file_operations pmu_info_proc_fops;
static const struct file_operations pmu_irqstats_proc_fops;
static void pmu_pass_intr(unsigned char *data, int len);
static int proc_get_batt(char *page, char **start, off_t off,
int count, int *eof, void *data);
static int proc_read_options(char *page, char **start, off_t off,
int count, int *eof, void *data);
static int proc_write_options(struct file *file, const char __user *buffer,
unsigned long count, void *data);
static const struct file_operations pmu_battery_proc_fops;
static const struct file_operations pmu_options_proc_fops;
#ifdef CONFIG_ADB
struct adb_driver via_pmu_driver = {
@@ -507,19 +502,15 @@ static int __init via_pmu_dev_init(void)
for (i=0; i<pmu_battery_count; i++) {
char title[16];
sprintf(title, "battery_%ld", i);
proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root,
proc_get_batt, (void *)i);
proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
&pmu_battery_proc_fops, (void *)i);
}
proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root,
proc_get_info, NULL);
proc_pmu_irqstats = create_proc_read_entry("interrupts", 0, proc_pmu_root,
proc_get_irqstats, NULL);
proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root);
if (proc_pmu_options) {
proc_pmu_options->read_proc = proc_read_options;
proc_pmu_options->write_proc = proc_write_options;
}
proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
&pmu_irqstats_proc_fops);
proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
&pmu_options_proc_fops);
}
return 0;
}
@@ -799,27 +790,33 @@ query_battery_state(void)
2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
}
static int
proc_get_info(char *page, char **start, off_t off,
int count, int *eof, void *data)
static int pmu_info_proc_show(struct seq_file *m, void *v)
{
char* p = page;
p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
p += sprintf(p, "PMU firmware version : %02x\n", pmu_version);
p += sprintf(p, "AC Power : %d\n",
seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
seq_printf(m, "AC Power : %d\n",
((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
p += sprintf(p, "Battery count : %d\n", pmu_battery_count);
seq_printf(m, "Battery count : %d\n", pmu_battery_count);
return p - page;
return 0;
}
static int
proc_get_irqstats(char *page, char **start, off_t off,
int count, int *eof, void *data)
static int pmu_info_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, pmu_info_proc_show, NULL);
}
static const struct file_operations pmu_info_proc_fops = {
.owner = THIS_MODULE,
.open = pmu_info_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
{
int i;
char* p = page;
static const char *irq_names[] = {
"Total CB1 triggered events",
"Total GPIO1 triggered events",
@@ -835,60 +832,76 @@ proc_get_irqstats(char *page, char **start, off_t off,
};
for (i=0; i<11; i++) {
p += sprintf(p, " %2u: %10u (%s)\n",
seq_printf(m, " %2u: %10u (%s)\n",
i, pmu_irq_stats[i], irq_names[i]);
}
return p - page;
return 0;
}
static int
proc_get_batt(char *page, char **start, off_t off,
int count, int *eof, void *data)
static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
{
long batnum = (long)data;
char *p = page;
return single_open(file, pmu_irqstats_proc_show, NULL);
}
static const struct file_operations pmu_irqstats_proc_fops = {
.owner = THIS_MODULE,
.open = pmu_irqstats_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int pmu_battery_proc_show(struct seq_file *m, void *v)
{
long batnum = (long)m->private;
p += sprintf(p, "\n");
p += sprintf(p, "flags : %08x\n",
pmu_batteries[batnum].flags);
p += sprintf(p, "charge : %d\n",
pmu_batteries[batnum].charge);
p += sprintf(p, "max_charge : %d\n",
pmu_batteries[batnum].max_charge);
p += sprintf(p, "current : %d\n",
pmu_batteries[batnum].amperage);
p += sprintf(p, "voltage : %d\n",
pmu_batteries[batnum].voltage);
p += sprintf(p, "time rem. : %d\n",
pmu_batteries[batnum].time_remaining);
return p - page;
seq_putc(m, '\n');
seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
return 0;
}
static int
proc_read_options(char *page, char **start, off_t off,
int count, int *eof, void *data)
static int pmu_battery_proc_open(struct inode *inode, struct file *file)
{
char *p = page;
return single_open(file, pmu_battery_proc_show, PDE(inode)->data);
}
static const struct file_operations pmu_battery_proc_fops = {
.owner = THIS_MODULE,
.open = pmu_battery_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int pmu_options_proc_show(struct seq_file *m, void *v)
{
#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
if (pmu_kind == PMU_KEYLARGO_BASED &&
pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup);
seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
#endif
if (pmu_kind == PMU_KEYLARGO_BASED)
p += sprintf(p, "server_mode=%d\n", option_server_mode);
seq_printf(m, "server_mode=%d\n", option_server_mode);
return p - page;
return 0;
}
static int
proc_write_options(struct file *file, const char __user *buffer,
unsigned long count, void *data)
static int pmu_options_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, pmu_options_proc_show, NULL);
}
static ssize_t pmu_options_proc_write(struct file *file,
const char __user *buffer, size_t count, loff_t *pos)
{
char tmp[33];
char *label, *val;
unsigned long fcount = count;
size_t fcount = count;
if (!count)
return -EINVAL;
@@ -927,6 +940,15 @@ proc_write_options(struct file *file, const char __user *buffer,
return fcount;
}
static const struct file_operations pmu_options_proc_fops = {
.owner = THIS_MODULE,
.open = pmu_options_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
.write = pmu_options_proc_write,
};
#ifdef CONFIG_ADB
/* Send an ADB command */
static int pmu_send_request(struct adb_request *req, int sync)

2
drivers/macintosh/windfarm_smu_controls.c
Visa fil

@@ -202,6 +202,8 @@ static struct smu_fan_control *smu_fan_create(struct device_node *node,
fct->ctrl.name = "cpu-front-fan-1";
else if (!strcmp(l, "CPU A PUMP"))
fct->ctrl.name = "cpu-pump-0";
else if (!strcmp(l, "CPU B PUMP"))
fct->ctrl.name = "cpu-pump-1";
else if (!strcmp(l, "Slots Fan") || !strcmp(l, "Slots fan") ||
!strcmp(l, "EXPANSION SLOTS INTAKE"))
fct->ctrl.name = "slots-fan";

2
drivers/mmc/host/of_mmc_spi.c
Visa fil

@@ -22,6 +22,8 @@
#include <linux/mmc/core.h>
#include <linux/mmc/host.h>
MODULE_LICENSE("GPL");
enum {
CD_GPIO = 0,
WP_GPIO,

51
drivers/net/ehea/ehea_hcall.h
Visa fil

@@ -1,51 +0,0 @@
/*
* linux/drivers/net/ehea/ehea_hcall.h
*
* eHEA ethernet device driver for IBM eServer System p
*
* (C) Copyright IBM Corp. 2006
*
* Authors:
* Christoph Raisch <raisch@de.ibm.com>
* Jan-Bernd Themann <themann@de.ibm.com>
* Thomas Klein <tklein@de.ibm.com>
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __EHEA_HCALL_H__
#define __EHEA_HCALL_H__
/**
* This file contains HCALL defines that are to be included in the appropriate
* kernel files later
*/
#define H_ALLOC_HEA_RESOURCE 0x278
#define H_MODIFY_HEA_QP 0x250
#define H_QUERY_HEA_QP 0x254
#define H_QUERY_HEA 0x258
#define H_QUERY_HEA_PORT 0x25C
#define H_MODIFY_HEA_PORT 0x260
#define H_REG_BCMC 0x264
#define H_DEREG_BCMC 0x268
#define H_REGISTER_HEA_RPAGES 0x26C
#define H_DISABLE_AND_GET_HEA 0x270
#define H_GET_HEA_INFO 0x274
#define H_ADD_CONN 0x284
#define H_DEL_CONN 0x288
#endif /* __EHEA_HCALL_H__ */

1
drivers/net/ehea/ehea_phyp.h
Visa fil

@@ -33,7 +33,6 @@
#include <asm/hvcall.h>
#include "ehea.h"
#include "ehea_hw.h"
#include "ehea_hcall.h"
/* Some abbreviations used here:
*

323
drivers/of/platform.c
Visa fil

@@ -65,28 +65,6 @@ static int of_platform_device_remove(struct device *dev)
return 0;
}
static int of_platform_device_suspend(struct device *dev, pm_message_t state)
{
struct of_device *of_dev = to_of_device(dev);
struct of_platform_driver *drv = to_of_platform_driver(dev->driver);
int error = 0;
if (dev->driver && drv->suspend)
error = drv->suspend(of_dev, state);
return error;
}
static int of_platform_device_resume(struct device * dev)
{
struct of_device *of_dev = to_of_device(dev);
struct of_platform_driver *drv = to_of_platform_driver(dev->driver);
int error = 0;
if (dev->driver && drv->resume)
error = drv->resume(of_dev);
return error;
}
static void of_platform_device_shutdown(struct device *dev)
{
struct of_device *of_dev = to_of_device(dev);
@@ -96,16 +74,313 @@ static void of_platform_device_shutdown(struct device *dev)
drv->shutdown(of_dev);
}
#ifdef CONFIG_PM_SLEEP
static int of_platform_legacy_suspend(struct device *dev, pm_message_t mesg)
{
struct of_device *of_dev = to_of_device(dev);
struct of_platform_driver *drv = to_of_platform_driver(dev->driver);
int ret = 0;
if (dev->driver && drv->suspend)
ret = drv->suspend(of_dev, mesg);
return ret;
}
static int of_platform_legacy_resume(struct device *dev)
{
struct of_device *of_dev = to_of_device(dev);
struct of_platform_driver *drv = to_of_platform_driver(dev->driver);
int ret = 0;
if (dev->driver && drv->resume)
ret = drv->resume(of_dev);
return ret;
}
static int of_platform_pm_prepare(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (drv && drv->pm && drv->pm->prepare)
ret = drv->pm->prepare(dev);
return ret;
}
static void of_platform_pm_complete(struct device *dev)
{
struct device_driver *drv = dev->driver;
if (drv && drv->pm && drv->pm->complete)
drv->pm->complete(dev);
}
#ifdef CONFIG_SUSPEND
static int of_platform_pm_suspend(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->suspend)
ret = drv->pm->suspend(dev);
} else {
ret = of_platform_legacy_suspend(dev, PMSG_SUSPEND);
}
return ret;
}
static int of_platform_pm_suspend_noirq(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->suspend_noirq)
ret = drv->pm->suspend_noirq(dev);
}
return ret;
}
static int of_platform_pm_resume(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->resume)
ret = drv->pm->resume(dev);
} else {
ret = of_platform_legacy_resume(dev);
}
return ret;
}
static int of_platform_pm_resume_noirq(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->resume_noirq)
ret = drv->pm->resume_noirq(dev);
}
return ret;
}
#else /* !CONFIG_SUSPEND */
#define of_platform_pm_suspend NULL
#define of_platform_pm_resume NULL
#define of_platform_pm_suspend_noirq NULL
#define of_platform_pm_resume_noirq NULL
#endif /* !CONFIG_SUSPEND */
#ifdef CONFIG_HIBERNATION
static int of_platform_pm_freeze(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->freeze)
ret = drv->pm->freeze(dev);
} else {
ret = of_platform_legacy_suspend(dev, PMSG_FREEZE);
}
return ret;
}
static int of_platform_pm_freeze_noirq(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->freeze_noirq)
ret = drv->pm->freeze_noirq(dev);
}
return ret;
}
static int of_platform_pm_thaw(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->thaw)
ret = drv->pm->thaw(dev);
} else {
ret = of_platform_legacy_resume(dev);
}
return ret;
}
static int of_platform_pm_thaw_noirq(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->thaw_noirq)
ret = drv->pm->thaw_noirq(dev);
}
return ret;
}
static int of_platform_pm_poweroff(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->poweroff)
ret = drv->pm->poweroff(dev);
} else {
ret = of_platform_legacy_suspend(dev, PMSG_HIBERNATE);
}
return ret;
}
static int of_platform_pm_poweroff_noirq(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->poweroff_noirq)
ret = drv->pm->poweroff_noirq(dev);
}
return ret;
}
static int of_platform_pm_restore(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->restore)
ret = drv->pm->restore(dev);
} else {
ret = of_platform_legacy_resume(dev);
}
return ret;
}
static int of_platform_pm_restore_noirq(struct device *dev)
{
struct device_driver *drv = dev->driver;
int ret = 0;
if (!drv)
return 0;
if (drv->pm) {
if (drv->pm->restore_noirq)
ret = drv->pm->restore_noirq(dev);
}
return ret;
}
#else /* !CONFIG_HIBERNATION */
#define of_platform_pm_freeze NULL
#define of_platform_pm_thaw NULL
#define of_platform_pm_poweroff NULL
#define of_platform_pm_restore NULL
#define of_platform_pm_freeze_noirq NULL
#define of_platform_pm_thaw_noirq NULL
#define of_platform_pm_poweroff_noirq NULL
#define of_platform_pm_restore_noirq NULL
#endif /* !CONFIG_HIBERNATION */
static struct dev_pm_ops of_platform_dev_pm_ops = {
.prepare = of_platform_pm_prepare,
.complete = of_platform_pm_complete,
.suspend = of_platform_pm_suspend,
.resume = of_platform_pm_resume,
.freeze = of_platform_pm_freeze,
.thaw = of_platform_pm_thaw,
.poweroff = of_platform_pm_poweroff,
.restore = of_platform_pm_restore,
.suspend_noirq = of_platform_pm_suspend_noirq,
.resume_noirq = of_platform_pm_resume_noirq,
.freeze_noirq = of_platform_pm_freeze_noirq,
.thaw_noirq = of_platform_pm_thaw_noirq,
.poweroff_noirq = of_platform_pm_poweroff_noirq,
.restore_noirq = of_platform_pm_restore_noirq,
};
#define OF_PLATFORM_PM_OPS_PTR (&of_platform_dev_pm_ops)
#else /* !CONFIG_PM_SLEEP */
#define OF_PLATFORM_PM_OPS_PTR NULL
#endif /* !CONFIG_PM_SLEEP */
int of_bus_type_init(struct bus_type *bus, const char *name)
{
bus->name = name;
bus->match = of_platform_bus_match;
bus->probe = of_platform_device_probe;
bus->remove = of_platform_device_remove;
bus->suspend = of_platform_device_suspend;
bus->resume = of_platform_device_resume;
bus->shutdown = of_platform_device_shutdown;
bus->dev_attrs = of_platform_device_attrs;
bus->pm = OF_PLATFORM_PM_OPS_PTR;
return bus_register(bus);
}

11
drivers/spi/Kconfig
Visa fil

@@ -133,6 +133,14 @@ config SPI_LM70_LLP
which interfaces to an LM70 temperature sensor using
a parallel port.
config SPI_MPC52xx
tristate "Freescale MPC52xx SPI (non-PSC) controller support"
depends on PPC_MPC52xx && SPI
select SPI_MASTER_OF
help
This drivers supports the MPC52xx SPI controller in master SPI
mode.
config SPI_MPC52xx_PSC
tristate "Freescale MPC52xx PSC SPI controller"
depends on PPC_MPC52xx && EXPERIMENTAL
@@ -147,9 +155,6 @@ config SPI_MPC8xxx
This enables using the Freescale MPC8xxx SPI controllers in master
mode.
This driver uses a simple set of shift registers for data (opposed
to the CPM based descriptor model).
config SPI_OMAP_UWIRE
tristate "OMAP1 MicroWire"
depends on ARCH_OMAP1

1
drivers/spi/Makefile
Visa fil

@@ -25,6 +25,7 @@ obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
obj-$(CONFIG_SPI_ORION) += orion_spi.o
obj-$(CONFIG_SPI_PL022) += amba-pl022.o
obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o
obj-$(CONFIG_SPI_MPC52xx) += mpc52xx_spi.o
obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o
obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o
obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o

25
drivers/spi/mpc52xx_psc_spi.c
Visa fil

@@ -17,6 +17,7 @@
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <linux/of_spi.h>
#include <linux/workqueue.h>
#include <linux/completion.h>
#include <linux/io.h>
@@ -313,11 +314,13 @@ static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
struct mpc52xx_psc __iomem *psc = mps->psc;
struct mpc52xx_psc_fifo __iomem *fifo = mps->fifo;
u32 mclken_div;
int ret = 0;
int ret;
/* default sysclk is 512MHz */
mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK;
mpc52xx_set_psc_clkdiv(psc_id, mclken_div);
ret = mpc52xx_set_psc_clkdiv(psc_id, mclken_div);
if (ret)
return ret;
/* Reset the PSC into a known state */
out_8(&psc->command, MPC52xx_PSC_RST_RX);
@@ -341,7 +344,7 @@ static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
mps->bits_per_word = 8;
return ret;
return 0;
}
static irqreturn_t mpc52xx_psc_spi_isr(int irq, void *dev_id)
@@ -410,8 +413,10 @@ static int __init mpc52xx_psc_spi_do_probe(struct device *dev, u32 regaddr,
goto free_master;
ret = mpc52xx_psc_spi_port_config(master->bus_num, mps);
if (ret < 0)
if (ret < 0) {
dev_err(dev, "can't configure PSC! Is it capable of SPI?\n");
goto free_irq;
}
spin_lock_init(&mps->lock);
init_completion(&mps->done);
@@ -464,10 +469,11 @@ static int __init mpc52xx_psc_spi_of_probe(struct of_device *op,
const u32 *regaddr_p;
u64 regaddr64, size64;
s16 id = -1;
int rc;
regaddr_p = of_get_address(op->node, 0, &size64, NULL);
if (!regaddr_p) {
printk(KERN_ERR "Invalid PSC address\n");
dev_err(&op->dev, "Invalid PSC address\n");
return -EINVAL;
}
regaddr64 = of_translate_address(op->node, regaddr_p);
@@ -478,15 +484,18 @@ static int __init mpc52xx_psc_spi_of_probe(struct of_device *op,
psc_nump = of_get_property(op->node, "cell-index", NULL);
if (!psc_nump || *psc_nump > 5) {
printk(KERN_ERR "mpc52xx_psc_spi: Device node %s has invalid "
"cell-index property\n", op->node->full_name);
dev_err(&op->dev, "Invalid cell-index property\n");
return -EINVAL;
}
id = *psc_nump + 1;
}
return mpc52xx_psc_spi_do_probe(&op->dev, (u32)regaddr64, (u32)size64,
rc = mpc52xx_psc_spi_do_probe(&op->dev, (u32)regaddr64, (u32)size64,
irq_of_parse_and_map(op->node, 0), id);
if (rc == 0)
of_register_spi_devices(dev_get_drvdata(&op->dev), op->node);
return rc;
}
static int __exit mpc52xx_psc_spi_of_remove(struct of_device *op)

520
drivers/spi/mpc52xx_spi.c Normal file
Visa fil

@@ -0,0 +1,520 @@
/*
* MPC52xx SPI bus driver.
*
* Copyright (C) 2008 Secret Lab Technologies Ltd.
*
* This file is released under the GPLv2
*
* This is the driver for the MPC5200's dedicated SPI controller.
*
* Note: this driver does not support the MPC5200 PSC in SPI mode. For
* that driver see drivers/spi/mpc52xx_psc_spi.c
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/of_platform.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/spi/spi.h>
#include <linux/spi/mpc52xx_spi.h>
#include <linux/of_spi.h>
#include <linux/io.h>
#include <asm/time.h>
#include <asm/mpc52xx.h>
MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
MODULE_LICENSE("GPL");
/* Register offsets */
#define SPI_CTRL1 0x00
#define SPI_CTRL1_SPIE (1 << 7)
#define SPI_CTRL1_SPE (1 << 6)
#define SPI_CTRL1_MSTR (1 << 4)
#define SPI_CTRL1_CPOL (1 << 3)
#define SPI_CTRL1_CPHA (1 << 2)
#define SPI_CTRL1_SSOE (1 << 1)
#define SPI_CTRL1_LSBFE (1 << 0)
#define SPI_CTRL2 0x01
#define SPI_BRR 0x04
#define SPI_STATUS 0x05
#define SPI_STATUS_SPIF (1 << 7)
#define SPI_STATUS_WCOL (1 << 6)
#define SPI_STATUS_MODF (1 << 4)
#define SPI_DATA 0x09
#define SPI_PORTDATA 0x0d
#define SPI_DATADIR 0x10
/* FSM state return values */
#define FSM_STOP 0 /* Nothing more for the state machine to */
/* do. If something interesting happens */
/* then and IRQ will be received */
#define FSM_POLL 1 /* need to poll for completion, an IRQ is */
/* not expected */
#define FSM_CONTINUE 2 /* Keep iterating the state machine */
/* Driver internal data */
struct mpc52xx_spi {
struct spi_master *master;
u32 sysclk;
void __iomem *regs;
int irq0; /* MODF irq */
int irq1; /* SPIF irq */
int ipb_freq;
/* Statistics */
int msg_count;
int wcol_count;
int wcol_ticks;
u32 wcol_tx_timestamp;
int modf_count;
int byte_count;
struct list_head queue; /* queue of pending messages */
spinlock_t lock;
struct work_struct work;
/* Details of current transfer (length, and buffer pointers) */
struct spi_message *message; /* current message */
struct spi_transfer *transfer; /* current transfer */
int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
int len;
int timestamp;
u8 *rx_buf;
const u8 *tx_buf;
int cs_change;
};
/*
* CS control function
*/
static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
{
out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
}
/*
* Start a new transfer. This is called both by the idle state
* for the first transfer in a message, and by the wait state when the
* previous transfer in a message is complete.
*/
static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
{
ms->rx_buf = ms->transfer->rx_buf;
ms->tx_buf = ms->transfer->tx_buf;
ms->len = ms->transfer->len;
/* Activate the chip select */
if (ms->cs_change)
mpc52xx_spi_chipsel(ms, 1);
ms->cs_change = ms->transfer->cs_change;
/* Write out the first byte */
ms->wcol_tx_timestamp = get_tbl();
if (ms->tx_buf)
out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
else
out_8(ms->regs + SPI_DATA, 0);
}
/* Forward declaration of state handlers */
static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
u8 status, u8 data);
static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
u8 status, u8 data);
/*
* IDLE state
*
* No transfers are in progress; if another transfer is pending then retrieve
* it and kick it off. Otherwise, stop processing the state machine
*/
static int
mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
{
struct spi_device *spi;
int spr, sppr;
u8 ctrl1;
if (status && (irq != NO_IRQ))
dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
status);
/* Check if there is another transfer waiting. */
if (list_empty(&ms->queue))
return FSM_STOP;
/* get the head of the queue */
ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
list_del_init(&ms->message->queue);
/* Setup the controller parameters */
ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
spi = ms->message->spi;
if (spi->mode & SPI_CPHA)
ctrl1 |= SPI_CTRL1_CPHA;
if (spi->mode & SPI_CPOL)
ctrl1 |= SPI_CTRL1_CPOL;
if (spi->mode & SPI_LSB_FIRST)
ctrl1 |= SPI_CTRL1_LSBFE;
out_8(ms->regs + SPI_CTRL1, ctrl1);
/* Setup the controller speed */
/* minimum divider is '2'. Also, add '1' to force rounding the
* divider up. */
sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
spr = 0;
if (sppr < 1)
sppr = 1;
while (((sppr - 1) & ~0x7) != 0) {
sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
spr++;
}
sppr--; /* sppr quantity in register is offset by 1 */
if (spr > 7) {
/* Don't overrun limits of SPI baudrate register */
spr = 7;
sppr = 7;
}
out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
ms->cs_change = 1;
ms->transfer = container_of(ms->message->transfers.next,
struct spi_transfer, transfer_list);
mpc52xx_spi_start_transfer(ms);
ms->state = mpc52xx_spi_fsmstate_transfer;
return FSM_CONTINUE;
}
/*
* TRANSFER state
*
* In the middle of a transfer. If the SPI core has completed processing
* a byte, then read out the received data and write out the next byte
* (unless this transfer is finished; in which case go on to the wait
* state)
*/
static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
u8 status, u8 data)
{
if (!status)
return ms->irq0 ? FSM_STOP : FSM_POLL;
if (status & SPI_STATUS_WCOL) {
/* The SPI controller is stoopid. At slower speeds, it may
* raise the SPIF flag before the state machine is actually
* finished, which causes a collision (internal to the state
* machine only). The manual recommends inserting a delay
* between receiving the interrupt and sending the next byte,
* but it can also be worked around simply by retrying the
* transfer which is what we do here. */
ms->wcol_count++;
ms->wcol_ticks += get_tbl() - ms->wcol_tx_timestamp;
ms->wcol_tx_timestamp = get_tbl();
data = 0;
if (ms->tx_buf)
data = *(ms->tx_buf-1);
out_8(ms->regs + SPI_DATA, data); /* try again */
return FSM_CONTINUE;
} else if (status & SPI_STATUS_MODF) {
ms->modf_count++;
dev_err(&ms->master->dev, "mode fault\n");
mpc52xx_spi_chipsel(ms, 0);
ms->message->status = -EIO;
ms->message->complete(ms->message->context);
ms->state = mpc52xx_spi_fsmstate_idle;
return FSM_CONTINUE;
}
/* Read data out of the spi device */
ms->byte_count++;
if (ms->rx_buf)
*ms->rx_buf++ = data;
/* Is the transfer complete? */
ms->len--;
if (ms->len == 0) {
ms->timestamp = get_tbl();
ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
ms->state = mpc52xx_spi_fsmstate_wait;
return FSM_CONTINUE;
}
/* Write out the next byte */
ms->wcol_tx_timestamp = get_tbl();
if (ms->tx_buf)
out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
else
out_8(ms->regs + SPI_DATA, 0);
return FSM_CONTINUE;
}
/*
* WAIT state
*
* A transfer has completed; need to wait for the delay period to complete
* before starting the next transfer
*/
static int
mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
{
if (status && irq)
dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
status);
if (((int)get_tbl()) - ms->timestamp < 0)
return FSM_POLL;
ms->message->actual_length += ms->transfer->len;
/* Check if there is another transfer in this message. If there
* aren't then deactivate CS, notify sender, and drop back to idle
* to start the next message. */
if (ms->transfer->transfer_list.next == &ms->message->transfers) {
ms->msg_count++;
mpc52xx_spi_chipsel(ms, 0);
ms->message->status = 0;
ms->message->complete(ms->message->context);
ms->state = mpc52xx_spi_fsmstate_idle;
return FSM_CONTINUE;
}
/* There is another transfer; kick it off */
if (ms->cs_change)
mpc52xx_spi_chipsel(ms, 0);
ms->transfer = container_of(ms->transfer->transfer_list.next,
struct spi_transfer, transfer_list);
mpc52xx_spi_start_transfer(ms);
ms->state = mpc52xx_spi_fsmstate_transfer;
return FSM_CONTINUE;
}
/**
* mpc52xx_spi_fsm_process - Finite State Machine iteration function
* @irq: irq number that triggered the FSM or 0 for polling
* @ms: pointer to mpc52xx_spi driver data
*/
static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
{
int rc = FSM_CONTINUE;
u8 status, data;
while (rc == FSM_CONTINUE) {
/* Interrupt cleared by read of STATUS followed by
* read of DATA registers */
status = in_8(ms->regs + SPI_STATUS);
data = in_8(ms->regs + SPI_DATA);
rc = ms->state(irq, ms, status, data);
}
if (rc == FSM_POLL)
schedule_work(&ms->work);
}
/**
* mpc52xx_spi_irq - IRQ handler
*/
static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
{
struct mpc52xx_spi *ms = _ms;
spin_lock(&ms->lock);
mpc52xx_spi_fsm_process(irq, ms);
spin_unlock(&ms->lock);
return IRQ_HANDLED;
}
/**
* mpc52xx_spi_wq - Workqueue function for polling the state machine
*/
static void mpc52xx_spi_wq(struct work_struct *work)
{
struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
unsigned long flags;
spin_lock_irqsave(&ms->lock, flags);
mpc52xx_spi_fsm_process(0, ms);
spin_unlock_irqrestore(&ms->lock, flags);
}
/*
* spi_master ops
*/
static int mpc52xx_spi_setup(struct spi_device *spi)
{
if (spi->bits_per_word % 8)
return -EINVAL;
if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST))
return -EINVAL;
if (spi->chip_select >= spi->master->num_chipselect)
return -EINVAL;
return 0;
}
static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
{
struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
unsigned long flags;
m->actual_length = 0;
m->status = -EINPROGRESS;
spin_lock_irqsave(&ms->lock, flags);
list_add_tail(&m->queue, &ms->queue);
spin_unlock_irqrestore(&ms->lock, flags);
schedule_work(&ms->work);
return 0;
}
/*
* OF Platform Bus Binding
*/
static int __devinit mpc52xx_spi_probe(struct of_device *op,
const struct of_device_id *match)
{
struct spi_master *master;
struct mpc52xx_spi *ms;
void __iomem *regs;
int rc;
/* MMIO registers */
dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
regs = of_iomap(op->node, 0);
if (!regs)
return -ENODEV;
/* initialize the device */
out_8(regs+SPI_CTRL1, SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR);
out_8(regs + SPI_CTRL2, 0x0);
out_8(regs + SPI_DATADIR, 0xe); /* Set output pins */
out_8(regs + SPI_PORTDATA, 0x8); /* Deassert /SS signal */
/* Clear the status register and re-read it to check for a MODF
* failure. This driver cannot currently handle multiple masters
* on the SPI bus. This fault will also occur if the SPI signals
* are not connected to any pins (port_config setting) */
in_8(regs + SPI_STATUS);
in_8(regs + SPI_DATA);
if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
dev_err(&op->dev, "mode fault; is port_config correct?\n");
rc = -EIO;
goto err_init;
}
dev_dbg(&op->dev, "allocating spi_master struct\n");
master = spi_alloc_master(&op->dev, sizeof *ms);
if (!master) {
rc = -ENOMEM;
goto err_alloc;
}
master->bus_num = -1;
master->num_chipselect = 1;
master->setup = mpc52xx_spi_setup;
master->transfer = mpc52xx_spi_transfer;
dev_set_drvdata(&op->dev, master);
ms = spi_master_get_devdata(master);
ms->master = master;
ms->regs = regs;
ms->irq0 = irq_of_parse_and_map(op->node, 0);
ms->irq1 = irq_of_parse_and_map(op->node, 1);
ms->state = mpc52xx_spi_fsmstate_idle;
ms->ipb_freq = mpc5xxx_get_bus_frequency(op->node);
spin_lock_init(&ms->lock);
INIT_LIST_HEAD(&ms->queue);
INIT_WORK(&ms->work, mpc52xx_spi_wq);
/* Decide if interrupts can be used */
if (ms->irq0 && ms->irq1) {
rc = request_irq(ms->irq0, mpc52xx_spi_irq, IRQF_SAMPLE_RANDOM,
"mpc5200-spi-modf", ms);
rc |= request_irq(ms->irq1, mpc52xx_spi_irq, IRQF_SAMPLE_RANDOM,
"mpc5200-spi-spiF", ms);
if (rc) {
free_irq(ms->irq0, ms);
free_irq(ms->irq1, ms);
ms->irq0 = ms->irq1 = 0;
}
} else {
/* operate in polled mode */
ms->irq0 = ms->irq1 = 0;
}
if (!ms->irq0)
dev_info(&op->dev, "using polled mode\n");
dev_dbg(&op->dev, "registering spi_master struct\n");
rc = spi_register_master(master);
if (rc)
goto err_register;
of_register_spi_devices(master, op->node);
dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
return rc;
err_register:
dev_err(&ms->master->dev, "initialization failed\n");
spi_master_put(master);
err_alloc:
err_init:
iounmap(regs);
return rc;
}
static int __devexit mpc52xx_spi_remove(struct of_device *op)
{
struct spi_master *master = dev_get_drvdata(&op->dev);
struct mpc52xx_spi *ms = spi_master_get_devdata(master);
free_irq(ms->irq0, ms);
free_irq(ms->irq1, ms);
spi_unregister_master(master);
spi_master_put(master);
iounmap(ms->regs);
return 0;
}
static struct of_device_id mpc52xx_spi_match[] __devinitdata = {
{ .compatible = "fsl,mpc5200-spi", },
{}
};
MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
static struct of_platform_driver mpc52xx_spi_of_driver = {
.owner = THIS_MODULE,
.name = "mpc52xx-spi",
.match_table = mpc52xx_spi_match,
.probe = mpc52xx_spi_probe,
.remove = __exit_p(mpc52xx_spi_remove),
};
static int __init mpc52xx_spi_init(void)
{
return of_register_platform_driver(&mpc52xx_spi_of_driver);
}
module_init(mpc52xx_spi_init);
static void __exit mpc52xx_spi_exit(void)
{
of_unregister_platform_driver(&mpc52xx_spi_of_driver);
}
module_exit(mpc52xx_spi_exit);

632
drivers/spi/spi_mpc8xxx.c
Visa fil

@@ -5,6 +5,10 @@
*
* Copyright (C) 2006 Polycom, Inc.
*
* CPM SPI and QE buffer descriptors mode support:
* Copyright (c) 2009 MontaVista Software, Inc.
* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
@@ -27,6 +31,9 @@
#include <linux/spi/spi_bitbang.h>
#include <linux/platform_device.h>
#include <linux/fsl_devices.h>
#include <linux/dma-mapping.h>
#include <linux/mm.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/gpio.h>
@@ -34,8 +41,19 @@
#include <linux/of_spi.h>
#include <sysdev/fsl_soc.h>
#include <asm/cpm.h>
#include <asm/qe.h>
#include <asm/irq.h>
/* CPM1 and CPM2 are mutually exclusive. */
#ifdef CONFIG_CPM1
#include <asm/cpm1.h>
#define CPM_SPI_CMD mk_cr_cmd(CPM_CR_CH_SPI, 0)
#else
#include <asm/cpm2.h>
#define CPM_SPI_CMD mk_cr_cmd(CPM_CR_SPI_PAGE, CPM_CR_SPI_SBLOCK, 0, 0)
#endif
/* SPI Controller registers */
struct mpc8xxx_spi_reg {
u8 res1[0x20];
@@ -47,6 +65,28 @@ struct mpc8xxx_spi_reg {
__be32 receive;
};
/* SPI Parameter RAM */
struct spi_pram {
__be16 rbase; /* Rx Buffer descriptor base address */
__be16 tbase; /* Tx Buffer descriptor base address */
u8 rfcr; /* Rx function code */
u8 tfcr; /* Tx function code */
__be16 mrblr; /* Max receive buffer length */
__be32 rstate; /* Internal */
__be32 rdp; /* Internal */
__be16 rbptr; /* Internal */
__be16 rbc; /* Internal */
__be32 rxtmp; /* Internal */
__be32 tstate; /* Internal */
__be32 tdp; /* Internal */
__be16 tbptr; /* Internal */
__be16 tbc; /* Internal */
__be32 txtmp; /* Internal */
__be32 res; /* Tx temp. */
__be16 rpbase; /* Relocation pointer (CPM1 only) */
__be16 res1; /* Reserved */
};
/* SPI Controller mode register definitions */
#define SPMODE_LOOP (1 << 30)
#define SPMODE_CI_INACTIVEHIGH (1 << 29)
@@ -75,14 +115,40 @@ struct mpc8xxx_spi_reg {
#define SPIM_NE 0x00000200 /* Not empty */
#define SPIM_NF 0x00000100 /* Not full */
#define SPIE_TXB 0x00000200 /* Last char is written to tx fifo */
#define SPIE_RXB 0x00000100 /* Last char is written to rx buf */
/* SPCOM register values */
#define SPCOM_STR (1 << 23) /* Start transmit */
#define SPI_PRAM_SIZE 0x100
#define SPI_MRBLR ((unsigned int)PAGE_SIZE)
/* SPI Controller driver's private data. */
struct mpc8xxx_spi {
struct device *dev;
struct mpc8xxx_spi_reg __iomem *base;
/* rx & tx bufs from the spi_transfer */
const void *tx;
void *rx;
int subblock;
struct spi_pram __iomem *pram;
struct cpm_buf_desc __iomem *tx_bd;
struct cpm_buf_desc __iomem *rx_bd;
struct spi_transfer *xfer_in_progress;
/* dma addresses for CPM transfers */
dma_addr_t tx_dma;
dma_addr_t rx_dma;
bool map_tx_dma;
bool map_rx_dma;
dma_addr_t dma_dummy_tx;
dma_addr_t dma_dummy_rx;
/* functions to deal with different sized buffers */
void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
u32(*get_tx) (struct mpc8xxx_spi *);
@@ -96,7 +162,7 @@ struct mpc8xxx_spi {
u32 rx_shift; /* RX data reg shift when in qe mode */
u32 tx_shift; /* TX data reg shift when in qe mode */
bool qe_mode;
unsigned int flags;
struct workqueue_struct *workqueue;
struct work_struct work;
@@ -107,6 +173,10 @@ struct mpc8xxx_spi {
struct completion done;
};
static void *mpc8xxx_dummy_rx;
static DEFINE_MUTEX(mpc8xxx_dummy_rx_lock);
static int mpc8xxx_dummy_rx_refcnt;
struct spi_mpc8xxx_cs {
/* functions to deal with different sized buffers */
void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
@@ -155,6 +225,42 @@ MPC83XX_SPI_TX_BUF(u8)
MPC83XX_SPI_TX_BUF(u16)
MPC83XX_SPI_TX_BUF(u32)
static void mpc8xxx_spi_change_mode(struct spi_device *spi)
{
struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
struct spi_mpc8xxx_cs *cs = spi->controller_state;
__be32 __iomem *mode = &mspi->base->mode;
unsigned long flags;
if (cs->hw_mode == mpc8xxx_spi_read_reg(mode))
return;
/* Turn off IRQs locally to minimize time that SPI is disabled. */
local_irq_save(flags);
/* Turn off SPI unit prior changing mode */
mpc8xxx_spi_write_reg(mode, cs->hw_mode & ~SPMODE_ENABLE);
mpc8xxx_spi_write_reg(mode, cs->hw_mode);
/* When in CPM mode, we need to reinit tx and rx. */
if (mspi->flags & SPI_CPM_MODE) {
if (mspi->flags & SPI_QE) {
qe_issue_cmd(QE_INIT_TX_RX, mspi->subblock,
QE_CR_PROTOCOL_UNSPECIFIED, 0);
} else {
cpm_command(CPM_SPI_CMD, CPM_CR_INIT_TRX);
if (mspi->flags & SPI_CPM1) {
out_be16(&mspi->pram->rbptr,
in_be16(&mspi->pram->rbase));
out_be16(&mspi->pram->tbptr,
in_be16(&mspi->pram->tbase));
}
}
}
local_irq_restore(flags);
}
static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
{
struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
@@ -168,27 +274,13 @@ static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
}
if (value == BITBANG_CS_ACTIVE) {
u32 regval = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
mpc8xxx_spi->rx_shift = cs->rx_shift;
mpc8xxx_spi->tx_shift = cs->tx_shift;
mpc8xxx_spi->get_rx = cs->get_rx;
mpc8xxx_spi->get_tx = cs->get_tx;
if (cs->hw_mode != regval) {
unsigned long flags;
__be32 __iomem *mode = &mpc8xxx_spi->base->mode;
mpc8xxx_spi_change_mode(spi);
regval = cs->hw_mode;
/* Turn off IRQs locally to minimize time that
* SPI is disabled
*/
local_irq_save(flags);
/* Turn off SPI unit prior changing mode */
mpc8xxx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
mpc8xxx_spi_write_reg(mode, regval);
local_irq_restore(flags);
}
if (pdata->cs_control)
pdata->cs_control(spi, pol);
}
@@ -198,7 +290,6 @@ static
int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
{
struct mpc8xxx_spi *mpc8xxx_spi;
u32 regval;
u8 bits_per_word, pm;
u32 hz;
struct spi_mpc8xxx_cs *cs = spi->controller_state;
@@ -230,14 +321,14 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
if (bits_per_word <= 8) {
cs->get_rx = mpc8xxx_spi_rx_buf_u8;
cs->get_tx = mpc8xxx_spi_tx_buf_u8;
if (mpc8xxx_spi->qe_mode) {
if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
cs->rx_shift = 16;
cs->tx_shift = 24;
}
} else if (bits_per_word <= 16) {
cs->get_rx = mpc8xxx_spi_rx_buf_u16;
cs->get_tx = mpc8xxx_spi_tx_buf_u16;
if (mpc8xxx_spi->qe_mode) {
if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
cs->rx_shift = 16;
cs->tx_shift = 16;
}
@@ -247,7 +338,8 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
} else
return -EINVAL;
if (mpc8xxx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) {
if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE &&
spi->mode & SPI_LSB_FIRST) {
cs->tx_shift = 0;
if (bits_per_word <= 8)
cs->rx_shift = 8;
@@ -286,37 +378,138 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
pm--;
cs->hw_mode |= SPMODE_PM(pm);
regval = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
if (cs->hw_mode != regval) {
unsigned long flags;
__be32 __iomem *mode = &mpc8xxx_spi->base->mode;
regval = cs->hw_mode;
/* Turn off IRQs locally to minimize time
* that SPI is disabled
*/
local_irq_save(flags);
/* Turn off SPI unit prior changing mode */
mpc8xxx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
mpc8xxx_spi_write_reg(mode, regval);
local_irq_restore(flags);
}
mpc8xxx_spi_change_mode(spi);
return 0;
}
static int mpc8xxx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
static void mpc8xxx_spi_cpm_bufs_start(struct mpc8xxx_spi *mspi)
{
struct mpc8xxx_spi *mpc8xxx_spi;
u32 word, len, bits_per_word;
struct cpm_buf_desc __iomem *tx_bd = mspi->tx_bd;
struct cpm_buf_desc __iomem *rx_bd = mspi->rx_bd;
unsigned int xfer_len = min(mspi->count, SPI_MRBLR);
unsigned int xfer_ofs;
mpc8xxx_spi = spi_master_get_devdata(spi->master);
xfer_ofs = mspi->xfer_in_progress->len - mspi->count;
out_be32(&rx_bd->cbd_bufaddr, mspi->rx_dma + xfer_ofs);
out_be16(&rx_bd->cbd_datlen, 0);
out_be16(&rx_bd->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT | BD_SC_WRAP);
out_be32(&tx_bd->cbd_bufaddr, mspi->tx_dma + xfer_ofs);
out_be16(&tx_bd->cbd_datlen, xfer_len);
out_be16(&tx_bd->cbd_sc, BD_SC_READY | BD_SC_INTRPT | BD_SC_WRAP |
BD_SC_LAST);
/* start transfer */
mpc8xxx_spi_write_reg(&mspi->base->command, SPCOM_STR);
}
static int mpc8xxx_spi_cpm_bufs(struct mpc8xxx_spi *mspi,
struct spi_transfer *t, bool is_dma_mapped)
{
struct device *dev = mspi->dev;
if (is_dma_mapped) {
mspi->map_tx_dma = 0;
mspi->map_rx_dma = 0;
} else {
mspi->map_tx_dma = 1;
mspi->map_rx_dma = 1;
}
if (!t->tx_buf) {
mspi->tx_dma = mspi->dma_dummy_tx;
mspi->map_tx_dma = 0;
}
if (!t->rx_buf) {
mspi->rx_dma = mspi->dma_dummy_rx;
mspi->map_rx_dma = 0;
}
if (mspi->map_tx_dma) {
void *nonconst_tx = (void *)mspi->tx; /* shut up gcc */
mspi->tx_dma = dma_map_single(dev, nonconst_tx, t->len,
DMA_TO_DEVICE);
if (dma_mapping_error(dev, mspi->tx_dma)) {
dev_err(dev, "unable to map tx dma\n");
return -ENOMEM;
}
} else {
mspi->tx_dma = t->tx_dma;
}
if (mspi->map_rx_dma) {
mspi->rx_dma = dma_map_single(dev, mspi->rx, t->len,
DMA_FROM_DEVICE);
if (dma_mapping_error(dev, mspi->rx_dma)) {
dev_err(dev, "unable to map rx dma\n");
goto err_rx_dma;
}
} else {
mspi->rx_dma = t->rx_dma;
}
/* enable rx ints */
mpc8xxx_spi_write_reg(&mspi->base->mask, SPIE_RXB);
mspi->xfer_in_progress = t;
mspi->count = t->len;
/* start CPM transfers */
mpc8xxx_spi_cpm_bufs_start(mspi);
return 0;
err_rx_dma:
if (mspi->map_tx_dma)
dma_unmap_single(dev, mspi->tx_dma, t->len, DMA_TO_DEVICE);
return -ENOMEM;
}
static void mpc8xxx_spi_cpm_bufs_complete(struct mpc8xxx_spi *mspi)
{
struct device *dev = mspi->dev;
struct spi_transfer *t = mspi->xfer_in_progress;
if (mspi->map_tx_dma)
dma_unmap_single(dev, mspi->tx_dma, t->len, DMA_TO_DEVICE);
if (mspi->map_tx_dma)
dma_unmap_single(dev, mspi->rx_dma, t->len, DMA_FROM_DEVICE);
mspi->xfer_in_progress = NULL;
}
static int mpc8xxx_spi_cpu_bufs(struct mpc8xxx_spi *mspi,
struct spi_transfer *t, unsigned int len)
{
u32 word;
mspi->count = len;
/* enable rx ints */
mpc8xxx_spi_write_reg(&mspi->base->mask, SPIM_NE);
/* transmit word */
word = mspi->get_tx(mspi);
mpc8xxx_spi_write_reg(&mspi->base->transmit, word);
return 0;
}
static int mpc8xxx_spi_bufs(struct spi_device *spi, struct spi_transfer *t,
bool is_dma_mapped)
{
struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
unsigned int len = t->len;
u8 bits_per_word;
int ret;
mpc8xxx_spi->tx = t->tx_buf;
mpc8xxx_spi->rx = t->rx_buf;
bits_per_word = spi->bits_per_word;
if (t->bits_per_word)
bits_per_word = t->bits_per_word;
len = t->len;
if (bits_per_word > 8) {
/* invalid length? */
if (len & 1)
@@ -329,22 +522,27 @@ static int mpc8xxx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
return -EINVAL;
len /= 2;
}
mpc8xxx_spi->count = len;
mpc8xxx_spi->tx = t->tx_buf;
mpc8xxx_spi->rx = t->rx_buf;
INIT_COMPLETION(mpc8xxx_spi->done);
/* enable rx ints */
mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, SPIM_NE);
/* transmit word */
word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->transmit, word);
if (mpc8xxx_spi->flags & SPI_CPM_MODE)
ret = mpc8xxx_spi_cpm_bufs(mpc8xxx_spi, t, is_dma_mapped);
else
ret = mpc8xxx_spi_cpu_bufs(mpc8xxx_spi, t, len);
if (ret)
return ret;
wait_for_completion(&mpc8xxx_spi->done);
/* disable rx ints */
mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
if (mpc8xxx_spi->flags & SPI_CPM_MODE)
mpc8xxx_spi_cpm_bufs_complete(mpc8xxx_spi);
return mpc8xxx_spi->count;
}
@@ -375,7 +573,7 @@ static void mpc8xxx_spi_do_one_msg(struct spi_message *m)
}
cs_change = t->cs_change;
if (t->len)
status = mpc8xxx_spi_bufs(spi, t);
status = mpc8xxx_spi_bufs(spi, t, m->is_dma_mapped);
if (status) {
status = -EMSGSIZE;
break;
@@ -464,45 +662,80 @@ static int mpc8xxx_spi_setup(struct spi_device *spi)
return 0;
}
static irqreturn_t mpc8xxx_spi_irq(s32 irq, void *context_data)
static void mpc8xxx_spi_cpm_irq(struct mpc8xxx_spi *mspi, u32 events)
{
struct mpc8xxx_spi *mpc8xxx_spi = context_data;
u32 event;
irqreturn_t ret = IRQ_NONE;
u16 len;
/* Get interrupt events(tx/rx) */
event = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->event);
dev_dbg(mspi->dev, "%s: bd datlen %d, count %d\n", __func__,
in_be16(&mspi->rx_bd->cbd_datlen), mspi->count);
/* We need handle RX first */
if (event & SPIE_NE) {
u32 rx_data = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->receive);
if (mpc8xxx_spi->rx)
mpc8xxx_spi->get_rx(rx_data, mpc8xxx_spi);
ret = IRQ_HANDLED;
}
if ((event & SPIE_NF) == 0)
/* spin until TX is done */
while (((event =
mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->event)) &
SPIE_NF) == 0)
cpu_relax();
mpc8xxx_spi->count -= 1;
if (mpc8xxx_spi->count) {
u32 word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->transmit, word);
} else {
complete(&mpc8xxx_spi->done);
len = in_be16(&mspi->rx_bd->cbd_datlen);
if (len > mspi->count) {
WARN_ON(1);
len = mspi->count;
}
/* Clear the events */
mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->event, event);
mpc8xxx_spi_write_reg(&mspi->base->event, events);
mspi->count -= len;
if (mspi->count)
mpc8xxx_spi_cpm_bufs_start(mspi);
else
complete(&mspi->done);
}
static void mpc8xxx_spi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events)
{
/* We need handle RX first */
if (events & SPIE_NE) {
u32 rx_data = mpc8xxx_spi_read_reg(&mspi->base->receive);
if (mspi->rx)
mspi->get_rx(rx_data, mspi);
}
if ((events & SPIE_NF) == 0)
/* spin until TX is done */
while (((events =
mpc8xxx_spi_read_reg(&mspi->base->event)) &
SPIE_NF) == 0)
cpu_relax();
/* Clear the events */
mpc8xxx_spi_write_reg(&mspi->base->event, events);
mspi->count -= 1;
if (mspi->count) {
u32 word = mspi->get_tx(mspi);
mpc8xxx_spi_write_reg(&mspi->base->transmit, word);
} else {
complete(&mspi->done);
}
}
static irqreturn_t mpc8xxx_spi_irq(s32 irq, void *context_data)
{
struct mpc8xxx_spi *mspi = context_data;
irqreturn_t ret = IRQ_NONE;
u32 events;
/* Get interrupt events(tx/rx) */
events = mpc8xxx_spi_read_reg(&mspi->base->event);
if (events)
ret = IRQ_HANDLED;
dev_dbg(mspi->dev, "%s: events %x\n", __func__, events);
if (mspi->flags & SPI_CPM_MODE)
mpc8xxx_spi_cpm_irq(mspi, events);
else
mpc8xxx_spi_cpu_irq(mspi, events);
return ret;
}
static int mpc8xxx_spi_transfer(struct spi_device *spi,
struct spi_message *m)
{
@@ -526,6 +759,215 @@ static void mpc8xxx_spi_cleanup(struct spi_device *spi)
kfree(spi->controller_state);
}
static void *mpc8xxx_spi_alloc_dummy_rx(void)
{
mutex_lock(&mpc8xxx_dummy_rx_lock);
if (!mpc8xxx_dummy_rx)
mpc8xxx_dummy_rx = kmalloc(SPI_MRBLR, GFP_KERNEL);
if (mpc8xxx_dummy_rx)
mpc8xxx_dummy_rx_refcnt++;
mutex_unlock(&mpc8xxx_dummy_rx_lock);
return mpc8xxx_dummy_rx;
}
static void mpc8xxx_spi_free_dummy_rx(void)
{
mutex_lock(&mpc8xxx_dummy_rx_lock);
switch (mpc8xxx_dummy_rx_refcnt) {
case 0:
WARN_ON(1);
break;
case 1:
kfree(mpc8xxx_dummy_rx);
mpc8xxx_dummy_rx = NULL;
/* fall through */
default:
mpc8xxx_dummy_rx_refcnt--;
break;
}
mutex_unlock(&mpc8xxx_dummy_rx_lock);
}
static unsigned long mpc8xxx_spi_cpm_get_pram(struct mpc8xxx_spi *mspi)
{
struct device *dev = mspi->dev;
struct device_node *np = dev_archdata_get_node(&dev->archdata);
const u32 *iprop;
int size;
unsigned long spi_base_ofs;
unsigned long pram_ofs = -ENOMEM;
/* Can't use of_address_to_resource(), QE muram isn't at 0. */
iprop = of_get_property(np, "reg", &size);
/* QE with a fixed pram location? */
if (mspi->flags & SPI_QE && iprop && size == sizeof(*iprop) * 4)
return cpm_muram_alloc_fixed(iprop[2], SPI_PRAM_SIZE);
/* QE but with a dynamic pram location? */
if (mspi->flags & SPI_QE) {
pram_ofs = cpm_muram_alloc(SPI_PRAM_SIZE, 64);
qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, mspi->subblock,
QE_CR_PROTOCOL_UNSPECIFIED, pram_ofs);
return pram_ofs;
}
/* CPM1 and CPM2 pram must be at a fixed addr. */
if (!iprop || size != sizeof(*iprop) * 4)
return -ENOMEM;
spi_base_ofs = cpm_muram_alloc_fixed(iprop[2], 2);
if (IS_ERR_VALUE(spi_base_ofs))
return -ENOMEM;
if (mspi->flags & SPI_CPM2) {
pram_ofs = cpm_muram_alloc(SPI_PRAM_SIZE, 64);
if (!IS_ERR_VALUE(pram_ofs)) {
u16 __iomem *spi_base = cpm_muram_addr(spi_base_ofs);
out_be16(spi_base, pram_ofs);
}
} else {
struct spi_pram __iomem *pram = cpm_muram_addr(spi_base_ofs);
u16 rpbase = in_be16(&pram->rpbase);
/* Microcode relocation patch applied? */
if (rpbase)
pram_ofs = rpbase;
else
return spi_base_ofs;
}
cpm_muram_free(spi_base_ofs);
return pram_ofs;
}
static int mpc8xxx_spi_cpm_init(struct mpc8xxx_spi *mspi)
{
struct device *dev = mspi->dev;
struct device_node *np = dev_archdata_get_node(&dev->archdata);
const u32 *iprop;
int size;
unsigned long pram_ofs;
unsigned long bds_ofs;
if (!(mspi->flags & SPI_CPM_MODE))
return 0;
if (!mpc8xxx_spi_alloc_dummy_rx())
return -ENOMEM;
if (mspi->flags & SPI_QE) {
iprop = of_get_property(np, "cell-index", &size);
if (iprop && size == sizeof(*iprop))
mspi->subblock = *iprop;
switch (mspi->subblock) {
default:
dev_warn(dev, "cell-index unspecified, assuming SPI1");
/* fall through */
case 0:
mspi->subblock = QE_CR_SUBBLOCK_SPI1;
break;
case 1:
mspi->subblock = QE_CR_SUBBLOCK_SPI2;
break;
}
}
pram_ofs = mpc8xxx_spi_cpm_get_pram(mspi);
if (IS_ERR_VALUE(pram_ofs)) {
dev_err(dev, "can't allocate spi parameter ram\n");
goto err_pram;
}
bds_ofs = cpm_muram_alloc(sizeof(*mspi->tx_bd) +
sizeof(*mspi->rx_bd), 8);
if (IS_ERR_VALUE(bds_ofs)) {
dev_err(dev, "can't allocate bds\n");
goto err_bds;
}
mspi->dma_dummy_tx = dma_map_single(dev, empty_zero_page, PAGE_SIZE,
DMA_TO_DEVICE);
if (dma_mapping_error(dev, mspi->dma_dummy_tx)) {
dev_err(dev, "unable to map dummy tx buffer\n");
goto err_dummy_tx;
}
mspi->dma_dummy_rx = dma_map_single(dev, mpc8xxx_dummy_rx, SPI_MRBLR,
DMA_FROM_DEVICE);
if (dma_mapping_error(dev, mspi->dma_dummy_rx)) {
dev_err(dev, "unable to map dummy rx buffer\n");
goto err_dummy_rx;
}
mspi->pram = cpm_muram_addr(pram_ofs);
mspi->tx_bd = cpm_muram_addr(bds_ofs);
mspi->rx_bd = cpm_muram_addr(bds_ofs + sizeof(*mspi->tx_bd));
/* Initialize parameter ram. */
out_be16(&mspi->pram->tbase, cpm_muram_offset(mspi->tx_bd));
out_be16(&mspi->pram->rbase, cpm_muram_offset(mspi->rx_bd));
out_8(&mspi->pram->tfcr, CPMFCR_EB | CPMFCR_GBL);
out_8(&mspi->pram->rfcr, CPMFCR_EB | CPMFCR_GBL);
out_be16(&mspi->pram->mrblr, SPI_MRBLR);
out_be32(&mspi->pram->rstate, 0);
out_be32(&mspi->pram->rdp, 0);
out_be16(&mspi->pram->rbptr, 0);
out_be16(&mspi->pram->rbc, 0);
out_be32(&mspi->pram->rxtmp, 0);
out_be32(&mspi->pram->tstate, 0);
out_be32(&mspi->pram->tdp, 0);
out_be16(&mspi->pram->tbptr, 0);
out_be16(&mspi->pram->tbc, 0);
out_be32(&mspi->pram->txtmp, 0);
return 0;
err_dummy_rx:
dma_unmap_single(dev, mspi->dma_dummy_tx, PAGE_SIZE, DMA_TO_DEVICE);
err_dummy_tx:
cpm_muram_free(bds_ofs);
err_bds:
cpm_muram_free(pram_ofs);
err_pram:
mpc8xxx_spi_free_dummy_rx();
return -ENOMEM;
}
static void mpc8xxx_spi_cpm_free(struct mpc8xxx_spi *mspi)
{
struct device *dev = mspi->dev;
dma_unmap_single(dev, mspi->dma_dummy_rx, SPI_MRBLR, DMA_FROM_DEVICE);
dma_unmap_single(dev, mspi->dma_dummy_tx, PAGE_SIZE, DMA_TO_DEVICE);
cpm_muram_free(cpm_muram_offset(mspi->tx_bd));
cpm_muram_free(cpm_muram_offset(mspi->pram));
mpc8xxx_spi_free_dummy_rx();
}
static const char *mpc8xxx_spi_strmode(unsigned int flags)
{
if (flags & SPI_QE_CPU_MODE) {
return "QE CPU";
} else if (flags & SPI_CPM_MODE) {
if (flags & SPI_QE)
return "QE";
else if (flags & SPI_CPM2)
return "CPM2";
else
return "CPM1";
}
return "CPU";
}
static struct spi_master * __devinit
mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
{
@@ -552,14 +994,19 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
master->cleanup = mpc8xxx_spi_cleanup;
mpc8xxx_spi = spi_master_get_devdata(master);
mpc8xxx_spi->qe_mode = pdata->qe_mode;
mpc8xxx_spi->dev = dev;
mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
mpc8xxx_spi->flags = pdata->flags;
mpc8xxx_spi->spibrg = pdata->sysclk;
ret = mpc8xxx_spi_cpm_init(mpc8xxx_spi);
if (ret)
goto err_cpm_init;
mpc8xxx_spi->rx_shift = 0;
mpc8xxx_spi->tx_shift = 0;
if (mpc8xxx_spi->qe_mode) {
if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
mpc8xxx_spi->rx_shift = 16;
mpc8xxx_spi->tx_shift = 24;
}
@@ -569,7 +1016,7 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
mpc8xxx_spi->base = ioremap(mem->start, mem->end - mem->start + 1);
if (mpc8xxx_spi->base == NULL) {
ret = -ENOMEM;
goto put_master;
goto err_ioremap;
}
mpc8xxx_spi->irq = irq;
@@ -592,7 +1039,7 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
/* Enable SPI interface */
regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
if (pdata->qe_mode)
if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE)
regval |= SPMODE_OP;
mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, regval);
@@ -612,9 +1059,8 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
if (ret < 0)
goto unreg_master;
printk(KERN_INFO
"%s: MPC8xxx SPI Controller driver at 0x%p (irq = %d)\n",
dev_name(dev), mpc8xxx_spi->base, mpc8xxx_spi->irq);
dev_info(dev, "at 0x%p (irq = %d), %s mode\n", mpc8xxx_spi->base,
mpc8xxx_spi->irq, mpc8xxx_spi_strmode(mpc8xxx_spi->flags));
return master;
@@ -624,7 +1070,9 @@ free_irq:
free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
unmap_io:
iounmap(mpc8xxx_spi->base);
put_master:
err_ioremap:
mpc8xxx_spi_cpm_free(mpc8xxx_spi);
err_cpm_init:
spi_master_put(master);
err:
return ERR_PTR(ret);
@@ -644,6 +1092,7 @@ static int __devexit mpc8xxx_spi_remove(struct device *dev)
free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
iounmap(mpc8xxx_spi->base);
mpc8xxx_spi_cpm_free(mpc8xxx_spi);
return 0;
}
@@ -709,6 +1158,7 @@ static int of_mpc8xxx_spi_get_chipselects(struct device *dev)
gpio = of_get_gpio_flags(np, i, &flags);
if (!gpio_is_valid(gpio)) {
dev_err(dev, "invalid gpio #%d: %d\n", i, gpio);
ret = gpio;
goto err_loop;
}
@@ -804,7 +1254,13 @@ static int __devinit of_mpc8xxx_spi_probe(struct of_device *ofdev,
prop = of_get_property(np, "mode", NULL);
if (prop && !strcmp(prop, "cpu-qe"))
pdata->qe_mode = 1;
pdata->flags = SPI_QE_CPU_MODE;
else if (prop && !strcmp(prop, "qe"))
pdata->flags = SPI_CPM_MODE | SPI_QE;
else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
pdata->flags = SPI_CPM_MODE | SPI_CPM2;
else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
pdata->flags = SPI_CPM_MODE | SPI_CPM1;
ret = of_mpc8xxx_spi_get_chipselects(dev);
if (ret)

3
drivers/spi/xilinx_spi.c
Visa fil

@@ -148,7 +148,8 @@ static int xilinx_spi_setup_transfer(struct spi_device *spi,
{
u8 bits_per_word;
bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word;
bits_per_word = (t && t->bits_per_word)
? t->bits_per_word : spi->bits_per_word;
if (bits_per_word != 8) {
dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
__func__, bits_per_word);

15
drivers/usb/gadget/fsl_qe_udc.h
Visa fil

@@ -419,19 +419,4 @@ struct qe_udc {
#define CPM_USB_RESTART_TX_OPCODE 0x0b
#define CPM_USB_EP_SHIFT 5
#ifndef CONFIG_CPM
inline int cpm_command(u32 command, u8 opcode)
{
return -EOPNOTSUPP;
}
#endif
#ifndef CONFIG_QUICC_ENGINE
inline int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol,
u32 cmd_input)
{
return -EOPNOTSUPP;
}
#endif
#endif /* __FSL_QE_UDC_H */

15
drivers/video/offb.c
Visa fil

@@ -282,8 +282,17 @@ static int offb_set_par(struct fb_info *info)
return 0;
}
static void offb_destroy(struct fb_info *info)
{
if (info->screen_base)
iounmap(info->screen_base);
release_mem_region(info->aperture_base, info->aperture_size);
framebuffer_release(info);
}
static struct fb_ops offb_ops = {
.owner = THIS_MODULE,
.fb_destroy = offb_destroy,
.fb_setcolreg = offb_setcolreg,
.fb_set_par = offb_set_par,
.fb_blank = offb_blank,
@@ -482,10 +491,14 @@ static void __init offb_init_fb(const char *name, const char *full_name,
var->sync = 0;
var->vmode = FB_VMODE_NONINTERLACED;
/* set offb aperture size for generic probing */
info->aperture_base = address;
info->aperture_size = fix->smem_len;
info->fbops = &offb_ops;
info->screen_base = ioremap(address, fix->smem_len);
info->pseudo_palette = (void *) (info + 1);
info->flags = FBINFO_DEFAULT | foreign_endian;
info->flags = FBINFO_DEFAULT | FBINFO_MISC_FIRMWARE | foreign_endian;
fb_alloc_cmap(&info->cmap, 256, 0);

4
drivers/watchdog/Kconfig
Visa fil

@@ -861,8 +861,10 @@ config GEF_WDT
Watchdog timer found in a number of GE Fanuc single board computers.
config MPC5200_WDT
tristate "MPC5200 Watchdog Timer"
bool "MPC52xx Watchdog Timer"
depends on PPC_MPC52xx
help
Use General Purpose Timer (GPT) 0 on the MPC5200 as Watchdog.
config 8xxx_WDT
tristate "MPC8xxx Platform Watchdog Timer"

1
drivers/watchdog/Makefile
Visa fil

@@ -118,7 +118,6 @@ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
# POWERPC Architecture
obj-$(CONFIG_GEF_WDT) += gef_wdt.o
obj-$(CONFIG_MPC5200_WDT) += mpc5200_wdt.o
obj-$(CONFIG_8xxx_WDT) += mpc8xxx_wdt.o
obj-$(CONFIG_MV64X60_WDT) += mv64x60_wdt.o
obj-$(CONFIG_PIKA_WDT) += pika_wdt.o

293
drivers/watchdog/mpc5200_wdt.c
Visa fil

@@ -1,293 +0,0 @@
#include <linux/init.h>
#include <linux/module.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <linux/of_platform.h>
#include <linux/uaccess.h>
#include <asm/mpc52xx.h>
#define GPT_MODE_WDT (1 << 15)
#define GPT_MODE_CE (1 << 12)
#define GPT_MODE_MS_TIMER (0x4)
struct mpc5200_wdt {
unsigned count; /* timer ticks before watchdog kicks in */
long ipb_freq;
struct miscdevice miscdev;
struct resource mem;
struct mpc52xx_gpt __iomem *regs;
spinlock_t io_lock;
};
/* is_active stores wether or not the /dev/watchdog device is opened */
static unsigned long is_active;
/* misc devices don't provide a way, to get back to 'dev' or 'miscdev' from
* file operations, which sucks. But there can be max 1 watchdog anyway, so...
*/
static struct mpc5200_wdt *wdt_global;
/* helper to calculate timeout in timer counts */
static void mpc5200_wdt_set_timeout(struct mpc5200_wdt *wdt, int timeout)
{
/* use biggest prescaler of 64k */
wdt->count = (wdt->ipb_freq + 0xffff) / 0x10000 * timeout;
if (wdt->count > 0xffff)
wdt->count = 0xffff;
}
/* return timeout in seconds (calculated from timer count) */
static int mpc5200_wdt_get_timeout(struct mpc5200_wdt *wdt)
{
return wdt->count * 0x10000 / wdt->ipb_freq;
}
/* watchdog operations */
static int mpc5200_wdt_start(struct mpc5200_wdt *wdt)
{
spin_lock(&wdt->io_lock);
/* disable */
out_be32(&wdt->regs->mode, 0);
/* set timeout, with maximum prescaler */
out_be32(&wdt->regs->count, 0x0 | wdt->count);
/* enable watchdog */
out_be32(&wdt->regs->mode, GPT_MODE_CE | GPT_MODE_WDT |
GPT_MODE_MS_TIMER);
spin_unlock(&wdt->io_lock);
return 0;
}
static int mpc5200_wdt_ping(struct mpc5200_wdt *wdt)
{
spin_lock(&wdt->io_lock);
/* writing A5 to OCPW resets the watchdog */
out_be32(&wdt->regs->mode, 0xA5000000 |
(0xffffff & in_be32(&wdt->regs->mode)));
spin_unlock(&wdt->io_lock);
return 0;
}
static int mpc5200_wdt_stop(struct mpc5200_wdt *wdt)
{
spin_lock(&wdt->io_lock);
/* disable */
out_be32(&wdt->regs->mode, 0);
spin_unlock(&wdt->io_lock);
return 0;
}
/* file operations */
static ssize_t mpc5200_wdt_write(struct file *file, const char __user *data,
size_t len, loff_t *ppos)
{
struct mpc5200_wdt *wdt = file->private_data;
mpc5200_wdt_ping(wdt);
return 0;
}
static struct watchdog_info mpc5200_wdt_info = {
.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
.identity = "mpc5200 watchdog on GPT0",
};
static long mpc5200_wdt_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
struct mpc5200_wdt *wdt = file->private_data;
int __user *data = (int __user *)arg;
int timeout;
int ret = 0;
switch (cmd) {
case WDIOC_GETSUPPORT:
ret = copy_to_user(data, &mpc5200_wdt_info,
sizeof(mpc5200_wdt_info));
if (ret)
ret = -EFAULT;
break;
case WDIOC_GETSTATUS:
case WDIOC_GETBOOTSTATUS:
ret = put_user(0, data);
break;
case WDIOC_KEEPALIVE:
mpc5200_wdt_ping(wdt);
break;
case WDIOC_SETTIMEOUT:
ret = get_user(timeout, data);
if (ret)
break;
mpc5200_wdt_set_timeout(wdt, timeout);
mpc5200_wdt_start(wdt);
/* fall through and return the timeout */
case WDIOC_GETTIMEOUT:
timeout = mpc5200_wdt_get_timeout(wdt);
ret = put_user(timeout, data);
break;
default:
ret = -ENOTTY;
}
return ret;
}
static int mpc5200_wdt_open(struct inode *inode, struct file *file)
{
/* /dev/watchdog can only be opened once */
if (test_and_set_bit(0, &is_active))
return -EBUSY;
/* Set and activate the watchdog */
mpc5200_wdt_set_timeout(wdt_global, 30);
mpc5200_wdt_start(wdt_global);
file->private_data = wdt_global;
return nonseekable_open(inode, file);
}
static int mpc5200_wdt_release(struct inode *inode, struct file *file)
{
#if WATCHDOG_NOWAYOUT == 0
struct mpc5200_wdt *wdt = file->private_data;
mpc5200_wdt_stop(wdt);
wdt->count = 0; /* == disabled */
#endif
clear_bit(0, &is_active);
return 0;
}
static const struct file_operations mpc5200_wdt_fops = {
.owner = THIS_MODULE,
.write = mpc5200_wdt_write,
.unlocked_ioctl = mpc5200_wdt_ioctl,
.open = mpc5200_wdt_open,
.release = mpc5200_wdt_release,
};
/* module operations */
static int mpc5200_wdt_probe(struct of_device *op,
const struct of_device_id *match)
{
struct mpc5200_wdt *wdt;
int err;
const void *has_wdt;
int size;
has_wdt = of_get_property(op->node, "has-wdt", NULL);
if (!has_wdt)
has_wdt = of_get_property(op->node, "fsl,has-wdt", NULL);
if (!has_wdt)
return -ENODEV;
wdt = kzalloc(sizeof(*wdt), GFP_KERNEL);
if (!wdt)
return -ENOMEM;
wdt->ipb_freq = mpc5xxx_get_bus_frequency(op->node);
err = of_address_to_resource(op->node, 0, &wdt->mem);
if (err)
goto out_free;
size = wdt->mem.end - wdt->mem.start + 1;
if (!request_mem_region(wdt->mem.start, size, "mpc5200_wdt")) {
err = -ENODEV;
goto out_free;
}
wdt->regs = ioremap(wdt->mem.start, size);
if (!wdt->regs) {
err = -ENODEV;
goto out_release;
}
dev_set_drvdata(&op->dev, wdt);
spin_lock_init(&wdt->io_lock);
wdt->miscdev = (struct miscdevice) {
.minor = WATCHDOG_MINOR,
.name = "watchdog",
.fops = &mpc5200_wdt_fops,
.parent = &op->dev,
};
wdt_global = wdt;
err = misc_register(&wdt->miscdev);
if (!err)
return 0;
iounmap(wdt->regs);
out_release:
release_mem_region(wdt->mem.start, size);
out_free:
kfree(wdt);
return err;
}
static int mpc5200_wdt_remove(struct of_device *op)
{
struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
mpc5200_wdt_stop(wdt);
misc_deregister(&wdt->miscdev);
iounmap(wdt->regs);
release_mem_region(wdt->mem.start, wdt->mem.end - wdt->mem.start + 1);
kfree(wdt);
return 0;
}
static int mpc5200_wdt_suspend(struct of_device *op, pm_message_t state)
{
struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
mpc5200_wdt_stop(wdt);
return 0;
}
static int mpc5200_wdt_resume(struct of_device *op)
{
struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
if (wdt->count)
mpc5200_wdt_start(wdt);
return 0;
}
static int mpc5200_wdt_shutdown(struct of_device *op)
{
struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
mpc5200_wdt_stop(wdt);
return 0;
}
static struct of_device_id mpc5200_wdt_match[] = {
{ .compatible = "mpc5200-gpt", },
{ .compatible = "fsl,mpc5200-gpt", },
{},
};
static struct of_platform_driver mpc5200_wdt_driver = {
.owner = THIS_MODULE,
.name = "mpc5200-gpt-wdt",
.match_table = mpc5200_wdt_match,
.probe = mpc5200_wdt_probe,
.remove = mpc5200_wdt_remove,
.suspend = mpc5200_wdt_suspend,
.resume = mpc5200_wdt_resume,
.shutdown = mpc5200_wdt_shutdown,
};
static int __init mpc5200_wdt_init(void)
{
return of_register_platform_driver(&mpc5200_wdt_driver);
}
static void __exit mpc5200_wdt_exit(void)
{
of_unregister_platform_driver(&mpc5200_wdt_driver);
}
module_init(mpc5200_wdt_init);
module_exit(mpc5200_wdt_exit);
MODULE_AUTHOR("Domen Puncer <domen.puncer@telargo.com>");
MODULE_LICENSE("Dual BSD/GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);