clk: meson: axg: add hifi pll clock

Add the hifi pll to the axg clock controller. This clock maybe used as an
input of the axg audio clock controller. It uses the same settings table
as the gp0 pll but has a frac parameter allowing more precision.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
此提交包含在:
Jerome Brunet
2018-02-19 12:21:43 +01:00
提交者 Neil Armstrong
父節點 a4fb7df25d
當前提交 093c3fac46
共有 2 個檔案被更改,包括 56 行新增1 行删除

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@@ -122,7 +122,7 @@
#define CLKID_MPLL2_DIV 67
#define CLKID_MPLL3_DIV 68
#define NR_CLKS 69
#define NR_CLKS 70
/* include the CLKIDs that have been made part of the DT binding */
#include <dt-bindings/clock/axg-clkc.h>