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[MIPS] zs.c: Resurrect the deceased zs.c for now.

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Not that it's meant to be sustained for long, but from time to time it's
useful to have some console...

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Maciej W. Rozycki
2005-06-13 19:58:50 +00:00
committed by Ralf Baechle
parent e0c9b79730
commit 0905780aae
2 changed files with 70 additions and 93 deletions
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13
drivers/tc/zs.h
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@@ -6,14 +6,14 @@
*
* Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
* Copyright (C) 2004 Maciej W. Rozycki
* Copyright (C) 2004, 2005 Maciej W. Rozycki
*/
#ifndef _DECSERIAL_H
#define _DECSERIAL_H
#include <asm/dec/serial.h>
#define NUM_ZSREGS 16
#define NUM_ZSREGS 16
struct serial_struct {
int type;
@@ -139,8 +139,7 @@ struct dec_serial {
int xmit_head;
int xmit_tail;
int xmit_cnt;
struct tq_struct tqueue;
struct tq_struct tqueue_hangup;
struct tasklet_struct tlet;
wait_queue_head_t open_wait;
wait_queue_head_t close_wait;
};
@@ -282,7 +281,7 @@ struct dec_serial {
#define DLC 4 /* Disable Lower Chain */
#define MIE 8 /* Master Interrupt Enable */
#define STATHI 0x10 /* Status high */
#define SOFTACK 0x20 /* Software Interrupt Acknowledge */
#define SOFTACK 0x20 /* Software Interrupt Acknowledge */
#define NORESET 0 /* No reset on write to R9 */
#define CHRB 0x40 /* Reset channel B */
#define CHRA 0x80 /* Reset channel A */
@@ -395,8 +394,8 @@ struct dec_serial {
/* Read Register 15 (value of WR 15) */
/* Misc macros */
#define ZS_CLEARERR(channel) (write_zsreg(channel, 0, ERR_RES))
#define ZS_CLEARFIFO(channel) do { volatile unsigned char garbage; \
#define ZS_CLEARERR(channel) (write_zsreg(channel, 0, ERR_RES))
#define ZS_CLEARFIFO(channel) do { volatile unsigned char garbage; \
garbage = read_zsdata(channel); \
garbage = read_zsdata(channel); \
garbage = read_zsdata(channel); \