dt-bindings: phy: add binding for the Lantiq VRX200 and ARX300 PCIe PHYs

Add the bindings for the PCIe PHY on Lantiq VRX200 and ARX300 SoCs.
The IP block contains settings for the PHY and a PLL.
The PLL mode is configurable through a dedicated #phy-cell in .dts.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
Martin Blumenstingl
2019-07-27 14:04:12 +02:00
committed by Kishon Vijay Abraham I
parent 609488bc97
commit 088e88be5a
2 changed files with 106 additions and 0 deletions

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2019 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
*/
#define LANTIQ_PCIE_PHY_MODE_25MHZ 0
#define LANTIQ_PCIE_PHY_MODE_25MHZ_SSC 1
#define LANTIQ_PCIE_PHY_MODE_36MHZ 2
#define LANTIQ_PCIE_PHY_MODE_36MHZ_SSC 3
#define LANTIQ_PCIE_PHY_MODE_100MHZ 4
#define LANTIQ_PCIE_PHY_MODE_100MHZ_SSC 5