USB: Implement support for EHCI with big endian MMIO
This patch implements supports for EHCI controllers whose MMIO registers are big endian and enables that functionality for the Toshiba SCC chip. It does _not_ add support for big endian in-memory data structures as this is not needed for that chip and I hope it will never be. The guts of the patch are to convert readl(...) to ehci_readl(ehci, ...) and similarly for register writes. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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committed by
Greg Kroah-Hartman

parent
11d1a4aa8d
commit
083522d766
@@ -43,7 +43,7 @@
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*/
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static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
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{
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u32 params = readl (&ehci->caps->hcs_params);
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u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
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ehci_dbg (ehci,
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"%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
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@@ -87,7 +87,7 @@ static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
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* */
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static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
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{
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u32 params = readl (&ehci->caps->hcc_params);
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u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
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if (HCC_ISOC_CACHE (params)) {
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ehci_dbg (ehci,
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@@ -653,7 +653,7 @@ show_registers (struct class_device *class_dev, char *buf)
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}
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/* Capability Registers */
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i = HC_VERSION(readl (&ehci->caps->hc_capbase));
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i = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
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temp = scnprintf (next, size,
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"bus %s, device %s (driver " DRIVER_VERSION ")\n"
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"%s\n"
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@@ -673,7 +673,7 @@ show_registers (struct class_device *class_dev, char *buf)
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unsigned count = 256/4;
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pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
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offset = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
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offset = HCC_EXT_CAPS (ehci_readl(ehci, &ehci->caps->hcc_params));
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while (offset && count--) {
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pci_read_config_dword (pdev, offset, &cap);
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switch (cap & 0xff) {
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@@ -704,50 +704,50 @@ show_registers (struct class_device *class_dev, char *buf)
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#endif
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// FIXME interpret both types of params
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i = readl (&ehci->caps->hcs_params);
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i = ehci_readl(ehci, &ehci->caps->hcs_params);
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temp = scnprintf (next, size, "structural params 0x%08x\n", i);
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size -= temp;
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next += temp;
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i = readl (&ehci->caps->hcc_params);
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i = ehci_readl(ehci, &ehci->caps->hcc_params);
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temp = scnprintf (next, size, "capability params 0x%08x\n", i);
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size -= temp;
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next += temp;
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/* Operational Registers */
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temp = dbg_status_buf (scratch, sizeof scratch, label,
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readl (&ehci->regs->status));
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ehci_readl(ehci, &ehci->regs->status));
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temp = scnprintf (next, size, fmt, temp, scratch);
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size -= temp;
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next += temp;
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temp = dbg_command_buf (scratch, sizeof scratch, label,
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readl (&ehci->regs->command));
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ehci_readl(ehci, &ehci->regs->command));
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temp = scnprintf (next, size, fmt, temp, scratch);
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size -= temp;
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next += temp;
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temp = dbg_intr_buf (scratch, sizeof scratch, label,
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readl (&ehci->regs->intr_enable));
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ehci_readl(ehci, &ehci->regs->intr_enable));
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temp = scnprintf (next, size, fmt, temp, scratch);
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size -= temp;
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next += temp;
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temp = scnprintf (next, size, "uframe %04x\n",
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readl (&ehci->regs->frame_index));
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ehci_readl(ehci, &ehci->regs->frame_index));
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size -= temp;
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next += temp;
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for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
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temp = dbg_port_buf (scratch, sizeof scratch, label, i,
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readl (&ehci->regs->port_status [i - 1]));
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ehci_readl(ehci, &ehci->regs->port_status [i - 1]));
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temp = scnprintf (next, size, fmt, temp, scratch);
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size -= temp;
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next += temp;
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if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
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temp = scnprintf (next, size,
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" debug control %08x\n",
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readl (&ehci->debug->control));
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ehci_readl(ehci, &ehci->debug->control));
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size -= temp;
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next += temp;
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}
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