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coresight: fix tmc flush timeout issue

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cpu will hang when FlushMan bit, StopOnFl bit don't be reset
to 0 and etm0 was enabled. This change disable source and link
for all activated path to workaround this issue when read tmc
from dev interface and switch etr out_mode.

Change-Id: Idf6d8cffcef0bedaeed91f28366f9c33e22bc0cb
Signed-off-by: Yuanfang Zhang <zhangyuanfang@codeaurora.org>
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
This commit is contained in:
Yuanfang Zhang
2019-11-05 18:50:57 +08:00
committed by Tingwei Zhang
parent f37e82faf4
commit 0726d3a73c
4 changed files with 167 additions and 10 deletions
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4
include/linux/coresight.h
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@@ -313,6 +313,8 @@ extern const char *coresight_alloc_device_name(struct coresight_dev_list *devs,
struct device *dev);
extern void coresight_disable_reg_clk(struct coresight_device *csdev);
extern int coresight_enable_reg_clk(struct coresight_device *csdev);
extern void coresight_disable_all_source_link(void);
extern void coresight_enable_all_source_link(void);
#else
static inline struct coresight_device *
coresight_register(struct coresight_desc *desc) { return NULL; }
@@ -339,6 +341,8 @@ static inline int coresight_enable_reg_clk(struct coresight_device *csdev)
{
return -EINVAL;
}
static void coresight_disable_all_source_link(void) {};
static void coresight_enable_all_source_link(void) {};
#endif
extern int coresight_get_cpu(struct device *dev);