Merge tag 'char-misc-4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc updates from Greg KH:
 "Here is the big set of char/misc driver patches for 4.17-rc1.

  There are a lot of little things in here, nothing huge, but all
  important to the different hardware types involved:

   -  thunderbolt driver updates

   -  parport updates (people still care...)

   -  nvmem driver updates

   -  mei updates (as always)

   -  hwtracing driver updates

   -  hyperv driver updates

   -  extcon driver updates

   -  ... and a handful of even smaller driver subsystem and individual
      driver updates

  All of these have been in linux-next with no reported issues"

* tag 'char-misc-4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (149 commits)
  hwtracing: Add HW tracing support menu
  intel_th: Add ACPI glue layer
  intel_th: Allow forcing host mode through drvdata
  intel_th: Pick up irq number from resources
  intel_th: Don't touch switch routing in host mode
  intel_th: Use correct method of finding hub
  intel_th: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate
  stm class: Make dummy's master/channel ranges configurable
  stm class: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate
  MAINTAINERS: Bestow upon myself the care for drivers/hwtracing
  hv: add SPDX license id to Kconfig
  hv: add SPDX license to trace
  Drivers: hv: vmbus: do not mark HV_PCIE as perf_device
  Drivers: hv: vmbus: respect what we get from hv_get_synint_state()
  /dev/mem: Avoid overwriting "err" in read_mem()
  eeprom: at24: use SPDX identifier instead of GPL boiler-plate
  eeprom: at24: simplify the i2c functionality checking
  eeprom: at24: fix a line break
  eeprom: at24: tweak newlines
  eeprom: at24: refactor at24_probe()
  ...
This commit is contained in:
Linus Torvalds
2018-04-04 20:07:20 -07:00
141 changed files with 3384 additions and 1214 deletions

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@@ -0,0 +1,49 @@
Samsung micro-USB 11-pin connector
==================================
Samsung micro-USB 11-pin connector is an extension of micro-USB connector.
It is present in multiple Samsung mobile devices.
It has additional pins to route MHL traffic simultanously with USB.
The bindings are superset of usb-connector bindings for micro-USB connector[1].
Required properties:
- compatible: must be: "samsung,usb-connector-11pin", "usb-b-connector",
- type: must be "micro".
Required nodes:
- any data bus to the connector should be modeled using the OF graph bindings
specified in bindings/graph.txt, unless the bus is between parent node and
the connector. Since single connector can have multpile data buses every bus
has assigned OF graph port number as follows:
0: High Speed (HS),
3: Mobile High-Definition Link (MHL), specific to 11-pin Samsung micro-USB.
[1]: bindings/connector/usb-connector.txt
Example
-------
Micro-USB connector with HS lines routed via controller (MUIC) and MHL lines
connected to HDMI-MHL bridge (sii8620):
muic-max77843@66 {
...
usb_con: connector {
compatible = "samsung,usb-connector-11pin", "usb-b-connector";
label = "micro-USB";
type = "micro";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@3 {
reg = <3>;
usb_con_mhl: endpoint {
remote-endpoint = <&sii8620_mhl>;
};
};
};
};
};

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@@ -0,0 +1,75 @@
USB Connector
=============
USB connector node represents physical USB connector. It should be
a child of USB interface controller.
Required properties:
- compatible: describes type of the connector, must be one of:
"usb-a-connector",
"usb-b-connector",
"usb-c-connector".
Optional properties:
- label: symbolic name for the connector,
- type: size of the connector, should be specified in case of USB-A, USB-B
non-fullsize connectors: "mini", "micro".
Required nodes:
- any data bus to the connector should be modeled using the OF graph bindings
specified in bindings/graph.txt, unless the bus is between parent node and
the connector. Since single connector can have multpile data buses every bus
has assigned OF graph port number as follows:
0: High Speed (HS), present in all connectors,
1: Super Speed (SS), present in SS capable connectors,
2: Sideband use (SBU), present in USB-C.
Examples
--------
1. Micro-USB connector with HS lines routed via controller (MUIC):
muic-max77843@66 {
...
usb_con: connector {
compatible = "usb-b-connector";
label = "micro-USB";
type = "micro";
};
};
2. USB-C connector attached to CC controller (s2mm005), HS lines routed
to companion PMIC (max77865), SS lines to USB3 PHY and SBU to DisplayPort.
DisplayPort video lines are routed to the connector via SS mux in USB3 PHY.
ccic: s2mm005@33 {
...
usb_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_con_hs: endpoint {
remote-endpoint = <&max77865_usbc_hs>;
};
};
port@1 {
reg = <1>;
usb_con_ss: endpoint {
remote-endpoint = <&usbdrd_phy_ss>;
};
};
port@2 {
reg = <2>;
usb_con_sbu: endpoint {
remote-endpoint = <&dp_aux>;
};
};
};
};
};

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@@ -0,0 +1,151 @@
FSI bus & engine generic device tree bindings
=============================================
The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
engines within those slaves. However, we have a facility to match devicetree
nodes to probed engines. This allows for fsi engines to expose non-probeable
busses, which are then exposed by the device tree. For example, an FSI engine
that is an I2C master - the I2C bus can be described by the device tree under
the engine's device tree node.
FSI masters may require their own DT nodes (to describe the master HW itself);
that requirement is defined by the master's implementation, and is described by
the fsi-master-* binding specifications.
Under the masters' nodes, we can describe the bus topology using nodes to
represent the FSI slaves and their slave engines. As a basic outline:
fsi-master {
/* top-level of FSI bus topology, bound to an FSI master driver and
* exposes an FSI bus */
fsi-slave@<link,id> {
/* this node defines the FSI slave device, and is handled
* entirely with FSI core code */
fsi-slave-engine@<addr> {
/* this node defines the engine endpoint & address range, which
* is bound to the relevant fsi device driver */
...
};
fsi-slave-engine@<addr> {
...
};
};
};
Note that since the bus is probe-able, some (or all) of the topology may
not be described; this binding only provides an optional facility for
adding subordinate device tree nodes as children of FSI engines.
FSI masters
-----------
FSI master nodes declare themselves as such with the "fsi-master" compatible
value. It's likely that an implementation-specific compatible value will
be needed as well, for example:
compatible = "fsi-master-gpio", "fsi-master";
Since the master nodes describe the top-level of the FSI topology, they also
need to declare the FSI-standard addressing scheme. This requires two cells for
addresses (link index and slave ID), and no size:
#address-cells = <2>;
#size-cells = <0>;
An optional boolean property can be added to indicate that a particular master
should not scan for connected devices at initialization time. This is
necessary in cases where a scan could cause arbitration issues with other
masters that may be present on the bus.
no-scan-on-init;
FSI slaves
----------
Slaves are identified by a (link-index, slave-id) pair, so require two cells
for an address identifier. Since these are not a range, no size cells are
required. For an example, a slave on link 1, with ID 2, could be represented
as:
cfam@1,2 {
reg = <1 2>;
[...];
}
Each slave provides an address-space, under which the engines are accessible.
That address space has a maximum of 23 bits, so we use one cell to represent
addresses and sizes in the slave address space:
#address-cells = <1>;
#size-cells = <1>;
FSI engines (devices)
---------------------
Engines are identified by their address under the slaves' address spaces. We
use a single cell for address and size. Engine nodes represent the endpoint
FSI device, and are passed to those FSI device drivers' ->probe() functions.
For example, for a slave using a single 0x400-byte page starting at address
0xc00:
engine@c00 {
reg = <0xc00 0x400>;
};
Full example
------------
Here's an example that illustrates:
- an FSI master
- connected to an FSI slave
- that contains an engine that is an I2C master
- connected to an I2C EEPROM
The FSI master may be connected to additional slaves, and slaves may have
additional engines, but they don't necessarily need to be describe in the
device tree if no extra platform information is required.
/* The GPIO-based FSI master node, describing the top level of the
* FSI bus
*/
gpio-fsi {
compatible = "fsi-master-gpio", "fsi-master";
#address-cells = <2>;
#size-cells = <0>;
/* A FSI slave (aka. CFAM) at link 0, ID 0. */
cfam@0,0 {
reg = <0 0>;
#address-cells = <1>;
#size-cells = <1>;
/* FSI engine at 0xc00, using a single page. In this example,
* it's an I2C master controller, so subnodes describe the
* I2C bus.
*/
i2c-controller@c00 {
reg = <0xc00 0x400>;
/* Engine-specific data. In this case, we're describing an
* I2C bus, so we're conforming to the generic I2C binding
*/
compatible = "some-vendor,fsi-i2c-controller";
#address-cells = <1>;
#size-cells = <1>;
/* I2C endpoint device: an Atmel EEPROM */
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
pagesize = <64>;
};
};
};
};

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@@ -109,9 +109,50 @@ lpc: lpc@1e789000 {
};
};
BMC Node Children
==================
Host Node Children
==================
LPC Host Interface Controller
-------------------
The LPC Host Interface Controller manages functions exposed to the host such as
LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
management and bus snoop configuration.
Required properties:
- compatible: One of:
"aspeed,ast2400-lpc-ctrl";
"aspeed,ast2500-lpc-ctrl";
- reg: contains offset/length values of the host interface controller
memory regions
- clocks: contains a phandle to the syscon node describing the clocks.
There should then be one cell representing the clock to use
- memory-region: A phandle to a reserved_memory region to be used for the LPC
to AHB mapping
- flash: A phandle to the SPI flash controller containing the flash to
be exposed over the LPC to AHB mapping
Example:
lpc-host@80 {
lpc_ctrl: lpc-ctrl@0 {
compatible = "aspeed,ast2500-lpc-ctrl";
reg = <0x0 0x80>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
memory-region = <&flash_memory>;
flash = <&spi>;
};
};
LPC Host Controller
-------------------

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@@ -11,17 +11,32 @@ Required properties:
"fsl,imx6ul-ocotp" (i.MX6UL),
"fsl,imx7d-ocotp" (i.MX7D/S),
followed by "syscon".
- #address-cells : Should be 1
- #size-cells : Should be 1
- reg: Should contain the register base and length.
- clocks: Should contain a phandle pointing to the gated peripheral clock.
Optional properties:
- read-only: disable write access
Example:
Optional Child nodes:
- Data cells of ocotp:
Detailed bindings are described in bindings/nvmem/nvmem.txt
Example:
ocotp: ocotp@21bc000 {
compatible = "fsl,imx6q-ocotp", "syscon";
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,imx6sx-ocotp", "syscon";
reg = <0x021bc000 0x4000>;
clocks = <&clks IMX6QDL_CLK_IIM>;
read-only;
clocks = <&clks IMX6SX_CLK_OCOTP>;
tempmon_calib: calib@38 {
reg = <0x38 4>;
};
tempmon_temp_grade: temp-grade@20 {
reg = <0x20 4>;
};
};

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@@ -1,5 +1,5 @@
Device tree bindings for Low Power General Purpose Register found in i.MX6Q/D
Secure Non-Volatile Storage.
and i.MX7 Secure Non-Volatile Storage.
This DT node should be represented as a sub-node of a "syscon",
"simple-mfd" node.
@@ -8,6 +8,7 @@ Required properties:
- compatible: should be one of the fallowing variants:
"fsl,imx6q-snvs-lpgpr" for Freescale i.MX6Q/D/DL/S
"fsl,imx6ul-snvs-lpgpr" for Freescale i.MX6UL
"fsl,imx7d-snvs-lpgpr" for Freescale i.MX7D/S
Example:
snvs: snvs@020cc000 {