drm/amdgpu/gmc9: set vram_width properly for SR-IOV
For SR-IOV, vram_width can't be read from ATOM as RAVEN, and DF related registers is not readable, so hardcord is the only way to set the correct vram_width. Reviewed-by: Yintian Tao <yttao@amd.com> Signed-off-by: Trigger Huang <Trigger.Huang@amd.com> Signed-off-by: Yintian Tao <yttao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -813,8 +813,16 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
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int chansize, numchan;
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int r;
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if (amdgpu_emu_mode != 1)
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if (amdgpu_sriov_vf(adev)) {
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/* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN,
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* and DF related registers is not readable, seems hardcord is the
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* only way to set the correct vram_width
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*/
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adev->gmc.vram_width = 2048;
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} else if (amdgpu_emu_mode != 1) {
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adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
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}
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if (!adev->gmc.vram_width) {
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/* hbm memory channel size */
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if (adev->flags & AMD_IS_APU)
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