Staging: ipack: move out of staging
The ipack subsystem is cleaned up enough to now move out of the staging tree, and into drivers/ipack. Cc: Samuel Iglesias Gonsalvez <siglesias@igalia.com> Cc: Jens Taprogge <jens.taprogge@taprogge.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Greg Kroah-Hartman
6
drivers/ipack/devices/Kconfig
Normal file
6
drivers/ipack/devices/Kconfig
Normal file
@@ -0,0 +1,6 @@
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config SERIAL_IPOCTAL
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tristate "IndustryPack IP-OCTAL uart support"
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depends on IPACK_BUS
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help
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This driver supports the IPOCTAL serial port device for the IndustryPack bus.
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default n
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1
drivers/ipack/devices/Makefile
Normal file
1
drivers/ipack/devices/Makefile
Normal file
@@ -0,0 +1 @@
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obj-$(CONFIG_SERIAL_IPOCTAL) += ipoctal.o
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751
drivers/ipack/devices/ipoctal.c
Normal file
751
drivers/ipack/devices/ipoctal.c
Normal file
@@ -0,0 +1,751 @@
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/**
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* ipoctal.c
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*
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* driver for the GE IP-OCTAL boards
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*
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* Copyright (C) 2009-2012 CERN (www.cern.ch)
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* Author: Nicolas Serafini, EIC2 SA
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* Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; version 2 of the License.
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*/
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <linux/tty.h>
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#include <linux/serial.h>
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#include <linux/tty_flip.h>
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#include <linux/slab.h>
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#include <linux/atomic.h>
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#include <linux/io.h>
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#include "../ipack.h"
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#include "ipoctal.h"
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#include "scc2698.h"
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#define IP_OCTAL_ID_SPACE_VECTOR 0x41
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#define IP_OCTAL_NB_BLOCKS 4
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static const struct tty_operations ipoctal_fops;
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struct ipoctal_channel {
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struct ipoctal_stats stats;
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unsigned int nb_bytes;
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wait_queue_head_t queue;
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spinlock_t lock;
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unsigned int pointer_read;
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unsigned int pointer_write;
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atomic_t open;
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struct tty_port tty_port;
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union scc2698_channel __iomem *regs;
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union scc2698_block __iomem *block_regs;
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unsigned int board_id;
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unsigned char *board_write;
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u8 isr_rx_rdy_mask;
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u8 isr_tx_rdy_mask;
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};
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struct ipoctal {
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struct ipack_device *dev;
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unsigned int board_id;
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struct ipoctal_channel channel[NR_CHANNELS];
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unsigned char write;
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struct tty_driver *tty_drv;
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u8 __iomem *mem8_space;
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u8 __iomem *int_space;
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};
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static int ipoctal_port_activate(struct tty_port *port, struct tty_struct *tty)
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{
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struct ipoctal_channel *channel;
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channel = dev_get_drvdata(tty->dev);
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iowrite8(CR_ENABLE_RX, &channel->regs->w.cr);
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return 0;
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}
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static int ipoctal_open(struct tty_struct *tty, struct file *file)
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{
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int res;
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struct ipoctal_channel *channel;
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channel = dev_get_drvdata(tty->dev);
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if (atomic_read(&channel->open))
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return -EBUSY;
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tty->driver_data = channel;
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res = tty_port_open(&channel->tty_port, tty, file);
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if (res)
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return res;
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atomic_inc(&channel->open);
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return 0;
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}
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static void ipoctal_reset_stats(struct ipoctal_stats *stats)
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{
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stats->tx = 0;
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stats->rx = 0;
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stats->rcv_break = 0;
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stats->framing_err = 0;
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stats->overrun_err = 0;
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stats->parity_err = 0;
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}
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static void ipoctal_free_channel(struct ipoctal_channel *channel)
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{
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ipoctal_reset_stats(&channel->stats);
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channel->pointer_read = 0;
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channel->pointer_write = 0;
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channel->nb_bytes = 0;
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}
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static void ipoctal_close(struct tty_struct *tty, struct file *filp)
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{
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struct ipoctal_channel *channel = tty->driver_data;
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tty_port_close(&channel->tty_port, tty, filp);
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if (atomic_dec_and_test(&channel->open))
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ipoctal_free_channel(channel);
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}
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static int ipoctal_get_icount(struct tty_struct *tty,
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struct serial_icounter_struct *icount)
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{
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struct ipoctal_channel *channel = tty->driver_data;
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icount->cts = 0;
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icount->dsr = 0;
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icount->rng = 0;
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icount->dcd = 0;
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icount->rx = channel->stats.rx;
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icount->tx = channel->stats.tx;
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icount->frame = channel->stats.framing_err;
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icount->parity = channel->stats.parity_err;
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icount->brk = channel->stats.rcv_break;
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return 0;
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}
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static void ipoctal_irq_rx(struct ipoctal_channel *channel,
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struct tty_struct *tty, u8 sr)
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{
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unsigned char value;
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unsigned char flag = TTY_NORMAL;
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u8 isr;
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do {
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value = ioread8(&channel->regs->r.rhr);
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/* Error: count statistics */
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if (sr & SR_ERROR) {
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iowrite8(CR_CMD_RESET_ERR_STATUS, &channel->regs->w.cr);
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if (sr & SR_OVERRUN_ERROR) {
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channel->stats.overrun_err++;
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/* Overrun doesn't affect the current character*/
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tty_insert_flip_char(tty, 0, TTY_OVERRUN);
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}
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if (sr & SR_PARITY_ERROR) {
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channel->stats.parity_err++;
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flag = TTY_PARITY;
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}
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if (sr & SR_FRAMING_ERROR) {
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channel->stats.framing_err++;
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flag = TTY_FRAME;
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}
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if (sr & SR_RECEIVED_BREAK) {
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iowrite8(CR_CMD_RESET_BREAK_CHANGE, &channel->regs->w.cr);
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channel->stats.rcv_break++;
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flag = TTY_BREAK;
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}
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}
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tty_insert_flip_char(tty, value, flag);
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/* Check if there are more characters in RX FIFO
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* If there are more, the isr register for this channel
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* has enabled the RxRDY|FFULL bit.
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*/
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isr = ioread8(&channel->block_regs->r.isr);
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sr = ioread8(&channel->regs->r.sr);
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} while (isr & channel->isr_rx_rdy_mask);
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tty_flip_buffer_push(tty);
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}
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static void ipoctal_irq_tx(struct ipoctal_channel *channel)
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{
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unsigned char value;
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unsigned int *pointer_write = &channel->pointer_write;
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if (channel->nb_bytes <= 0) {
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channel->nb_bytes = 0;
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return;
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}
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value = channel->tty_port.xmit_buf[*pointer_write];
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iowrite8(value, &channel->regs->w.thr);
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channel->stats.tx++;
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(*pointer_write)++;
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*pointer_write = *pointer_write % PAGE_SIZE;
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channel->nb_bytes--;
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if ((channel->nb_bytes == 0) &&
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(waitqueue_active(&channel->queue))) {
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if (channel->board_id != IPACK1_DEVICE_ID_SBS_OCTAL_485) {
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*channel->board_write = 1;
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wake_up_interruptible(&channel->queue);
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}
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}
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}
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static void ipoctal_irq_channel(struct ipoctal_channel *channel)
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{
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u8 isr, sr;
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struct tty_struct *tty;
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/* If there is no client, skip the check */
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if (!atomic_read(&channel->open))
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return;
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tty = tty_port_tty_get(&channel->tty_port);
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if (!tty)
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return;
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/* The HW is organized in pair of channels. See which register we need
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* to read from */
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isr = ioread8(&channel->block_regs->r.isr);
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sr = ioread8(&channel->regs->r.sr);
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/* In case of RS-485, change from TX to RX when finishing TX.
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* Half-duplex. */
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if ((channel->board_id == IPACK1_DEVICE_ID_SBS_OCTAL_485) &&
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(sr & SR_TX_EMPTY) && (channel->nb_bytes == 0)) {
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iowrite8(CR_DISABLE_TX, &channel->regs->w.cr);
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iowrite8(CR_CMD_NEGATE_RTSN, &channel->regs->w.cr);
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iowrite8(CR_ENABLE_RX, &channel->regs->w.cr);
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*channel->board_write = 1;
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wake_up_interruptible(&channel->queue);
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}
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/* RX data */
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if ((isr & channel->isr_rx_rdy_mask) && (sr & SR_RX_READY))
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ipoctal_irq_rx(channel, tty, sr);
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/* TX of each character */
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if ((isr & channel->isr_tx_rdy_mask) && (sr & SR_TX_READY))
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ipoctal_irq_tx(channel);
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tty_flip_buffer_push(tty);
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tty_kref_put(tty);
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}
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static irqreturn_t ipoctal_irq_handler(void *arg)
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{
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unsigned int i;
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struct ipoctal *ipoctal = (struct ipoctal *) arg;
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/* Check all channels */
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for (i = 0; i < NR_CHANNELS; i++)
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ipoctal_irq_channel(&ipoctal->channel[i]);
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/* Clear the IPack device interrupt */
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readw(ipoctal->int_space + ACK_INT_REQ0);
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readw(ipoctal->int_space + ACK_INT_REQ1);
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return IRQ_HANDLED;
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}
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static const struct tty_port_operations ipoctal_tty_port_ops = {
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.dtr_rts = NULL,
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.activate = ipoctal_port_activate,
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};
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static int ipoctal_inst_slot(struct ipoctal *ipoctal, unsigned int bus_nr,
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unsigned int slot)
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{
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int res;
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int i;
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struct tty_driver *tty;
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char name[20];
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struct ipoctal_channel *channel;
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struct ipack_region *region;
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void __iomem *addr;
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union scc2698_channel __iomem *chan_regs;
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union scc2698_block __iomem *block_regs;
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ipoctal->board_id = ipoctal->dev->id_device;
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region = &ipoctal->dev->region[IPACK_IO_SPACE];
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addr = devm_ioremap_nocache(&ipoctal->dev->dev,
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region->start, region->size);
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if (!addr) {
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dev_err(&ipoctal->dev->dev,
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"Unable to map slot [%d:%d] IO space!\n",
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bus_nr, slot);
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return -EADDRNOTAVAIL;
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}
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/* Save the virtual address to access the registers easily */
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chan_regs =
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(union scc2698_channel __iomem *) addr;
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block_regs =
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(union scc2698_block __iomem *) addr;
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region = &ipoctal->dev->region[IPACK_INT_SPACE];
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ipoctal->int_space =
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devm_ioremap_nocache(&ipoctal->dev->dev,
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region->start, region->size);
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if (!ipoctal->int_space) {
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dev_err(&ipoctal->dev->dev,
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"Unable to map slot [%d:%d] INT space!\n",
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bus_nr, slot);
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return -EADDRNOTAVAIL;
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}
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region = &ipoctal->dev->region[IPACK_MEM8_SPACE];
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ipoctal->mem8_space =
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devm_ioremap_nocache(&ipoctal->dev->dev,
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region->start, 0x8000);
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if (!addr) {
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dev_err(&ipoctal->dev->dev,
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"Unable to map slot [%d:%d] MEM8 space!\n",
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bus_nr, slot);
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return -EADDRNOTAVAIL;
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}
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/* Disable RX and TX before touching anything */
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for (i = 0; i < NR_CHANNELS ; i++) {
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struct ipoctal_channel *channel = &ipoctal->channel[i];
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channel->regs = chan_regs + i;
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channel->block_regs = block_regs + (i >> 1);
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channel->board_write = &ipoctal->write;
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channel->board_id = ipoctal->board_id;
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if (i & 1) {
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channel->isr_tx_rdy_mask = ISR_TxRDY_B;
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channel->isr_rx_rdy_mask = ISR_RxRDY_FFULL_B;
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} else {
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channel->isr_tx_rdy_mask = ISR_TxRDY_A;
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channel->isr_rx_rdy_mask = ISR_RxRDY_FFULL_A;
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}
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iowrite8(CR_DISABLE_RX | CR_DISABLE_TX, &channel->regs->w.cr);
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iowrite8(CR_CMD_RESET_RX, &channel->regs->w.cr);
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iowrite8(CR_CMD_RESET_TX, &channel->regs->w.cr);
|
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iowrite8(MR1_CHRL_8_BITS | MR1_ERROR_CHAR | MR1_RxINT_RxRDY,
|
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&channel->regs->w.mr); /* mr1 */
|
||||
iowrite8(0, &channel->regs->w.mr); /* mr2 */
|
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iowrite8(TX_CLK_9600 | RX_CLK_9600, &channel->regs->w.csr);
|
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}
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for (i = 0; i < IP_OCTAL_NB_BLOCKS; i++) {
|
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iowrite8(ACR_BRG_SET2, &block_regs[i].w.acr);
|
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iowrite8(OPCR_MPP_OUTPUT | OPCR_MPOa_RTSN | OPCR_MPOb_RTSN,
|
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&block_regs[i].w.opcr);
|
||||
iowrite8(IMR_TxRDY_A | IMR_RxRDY_FFULL_A | IMR_DELTA_BREAK_A |
|
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IMR_TxRDY_B | IMR_RxRDY_FFULL_B | IMR_DELTA_BREAK_B,
|
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&block_regs[i].w.imr);
|
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}
|
||||
|
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/*
|
||||
* IP-OCTAL has different addresses to copy its IRQ vector.
|
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* Depending of the carrier these addresses are accesible or not.
|
||||
* More info in the datasheet.
|
||||
*/
|
||||
ipoctal->dev->bus->ops->request_irq(ipoctal->dev,
|
||||
ipoctal_irq_handler, ipoctal);
|
||||
/* Dummy write */
|
||||
iowrite8(1, ipoctal->mem8_space + 1);
|
||||
|
||||
/* Register the TTY device */
|
||||
|
||||
/* Each IP-OCTAL channel is a TTY port */
|
||||
tty = alloc_tty_driver(NR_CHANNELS);
|
||||
|
||||
if (!tty)
|
||||
return -ENOMEM;
|
||||
|
||||
/* Fill struct tty_driver with ipoctal data */
|
||||
tty->owner = THIS_MODULE;
|
||||
tty->driver_name = KBUILD_MODNAME;
|
||||
sprintf(name, KBUILD_MODNAME ".%d.%d.", bus_nr, slot);
|
||||
tty->name = name;
|
||||
tty->major = 0;
|
||||
|
||||
tty->minor_start = 0;
|
||||
tty->type = TTY_DRIVER_TYPE_SERIAL;
|
||||
tty->subtype = SERIAL_TYPE_NORMAL;
|
||||
tty->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
|
||||
tty->init_termios = tty_std_termios;
|
||||
tty->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
|
||||
tty->init_termios.c_ispeed = 9600;
|
||||
tty->init_termios.c_ospeed = 9600;
|
||||
|
||||
tty_set_operations(tty, &ipoctal_fops);
|
||||
res = tty_register_driver(tty);
|
||||
if (res) {
|
||||
dev_err(&ipoctal->dev->dev, "Can't register tty driver.\n");
|
||||
put_tty_driver(tty);
|
||||
return res;
|
||||
}
|
||||
|
||||
/* Save struct tty_driver for use it when uninstalling the device */
|
||||
ipoctal->tty_drv = tty;
|
||||
|
||||
for (i = 0; i < NR_CHANNELS; i++) {
|
||||
struct device *tty_dev;
|
||||
|
||||
channel = &ipoctal->channel[i];
|
||||
tty_port_init(&channel->tty_port);
|
||||
tty_port_alloc_xmit_buf(&channel->tty_port);
|
||||
channel->tty_port.ops = &ipoctal_tty_port_ops;
|
||||
|
||||
ipoctal_reset_stats(&channel->stats);
|
||||
channel->nb_bytes = 0;
|
||||
init_waitqueue_head(&channel->queue);
|
||||
|
||||
spin_lock_init(&channel->lock);
|
||||
channel->pointer_read = 0;
|
||||
channel->pointer_write = 0;
|
||||
tty_dev = tty_port_register_device(&channel->tty_port, tty, i, NULL);
|
||||
if (IS_ERR(tty_dev)) {
|
||||
dev_err(&ipoctal->dev->dev, "Failed to register tty device.\n");
|
||||
continue;
|
||||
}
|
||||
dev_set_drvdata(tty_dev, channel);
|
||||
|
||||
/*
|
||||
* Enable again the RX. TX will be enabled when
|
||||
* there is something to send
|
||||
*/
|
||||
iowrite8(CR_ENABLE_RX, &channel->regs->w.cr);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int ipoctal_copy_write_buffer(struct ipoctal_channel *channel,
|
||||
const unsigned char *buf,
|
||||
int count)
|
||||
{
|
||||
unsigned long flags;
|
||||
int i;
|
||||
unsigned int *pointer_read = &channel->pointer_read;
|
||||
|
||||
/* Copy the bytes from the user buffer to the internal one */
|
||||
for (i = 0; i < count; i++) {
|
||||
if (i <= (PAGE_SIZE - channel->nb_bytes)) {
|
||||
spin_lock_irqsave(&channel->lock, flags);
|
||||
channel->tty_port.xmit_buf[*pointer_read] = buf[i];
|
||||
*pointer_read = (*pointer_read + 1) % PAGE_SIZE;
|
||||
channel->nb_bytes++;
|
||||
spin_unlock_irqrestore(&channel->lock, flags);
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
}
|
||||
return i;
|
||||
}
|
||||
|
||||
static int ipoctal_write_tty(struct tty_struct *tty,
|
||||
const unsigned char *buf, int count)
|
||||
{
|
||||
struct ipoctal_channel *channel = tty->driver_data;
|
||||
unsigned int char_copied;
|
||||
|
||||
char_copied = ipoctal_copy_write_buffer(channel, buf, count);
|
||||
|
||||
/* As the IP-OCTAL 485 only supports half duplex, do it manually */
|
||||
if (channel->board_id == IPACK1_DEVICE_ID_SBS_OCTAL_485) {
|
||||
iowrite8(CR_DISABLE_RX, &channel->regs->w.cr);
|
||||
iowrite8(CR_CMD_ASSERT_RTSN, &channel->regs->w.cr);
|
||||
}
|
||||
|
||||
/*
|
||||
* Send a packet and then disable TX to avoid failure after several send
|
||||
* operations
|
||||
*/
|
||||
iowrite8(CR_ENABLE_TX, &channel->regs->w.cr);
|
||||
wait_event_interruptible(channel->queue, *channel->board_write);
|
||||
iowrite8(CR_DISABLE_TX, &channel->regs->w.cr);
|
||||
|
||||
*channel->board_write = 0;
|
||||
return char_copied;
|
||||
}
|
||||
|
||||
static int ipoctal_write_room(struct tty_struct *tty)
|
||||
{
|
||||
struct ipoctal_channel *channel = tty->driver_data;
|
||||
|
||||
return PAGE_SIZE - channel->nb_bytes;
|
||||
}
|
||||
|
||||
static int ipoctal_chars_in_buffer(struct tty_struct *tty)
|
||||
{
|
||||
struct ipoctal_channel *channel = tty->driver_data;
|
||||
|
||||
return channel->nb_bytes;
|
||||
}
|
||||
|
||||
static void ipoctal_set_termios(struct tty_struct *tty,
|
||||
struct ktermios *old_termios)
|
||||
{
|
||||
unsigned int cflag;
|
||||
unsigned char mr1 = 0;
|
||||
unsigned char mr2 = 0;
|
||||
unsigned char csr = 0;
|
||||
struct ipoctal_channel *channel = tty->driver_data;
|
||||
speed_t baud;
|
||||
|
||||
cflag = tty->termios.c_cflag;
|
||||
|
||||
/* Disable and reset everything before change the setup */
|
||||
iowrite8(CR_DISABLE_RX | CR_DISABLE_TX, &channel->regs->w.cr);
|
||||
iowrite8(CR_CMD_RESET_RX, &channel->regs->w.cr);
|
||||
iowrite8(CR_CMD_RESET_TX, &channel->regs->w.cr);
|
||||
iowrite8(CR_CMD_RESET_ERR_STATUS, &channel->regs->w.cr);
|
||||
iowrite8(CR_CMD_RESET_MR, &channel->regs->w.cr);
|
||||
|
||||
/* Set Bits per chars */
|
||||
switch (cflag & CSIZE) {
|
||||
case CS6:
|
||||
mr1 |= MR1_CHRL_6_BITS;
|
||||
break;
|
||||
case CS7:
|
||||
mr1 |= MR1_CHRL_7_BITS;
|
||||
break;
|
||||
case CS8:
|
||||
default:
|
||||
mr1 |= MR1_CHRL_8_BITS;
|
||||
/* By default, select CS8 */
|
||||
tty->termios.c_cflag = (cflag & ~CSIZE) | CS8;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Set Parity */
|
||||
if (cflag & PARENB)
|
||||
if (cflag & PARODD)
|
||||
mr1 |= MR1_PARITY_ON | MR1_PARITY_ODD;
|
||||
else
|
||||
mr1 |= MR1_PARITY_ON | MR1_PARITY_EVEN;
|
||||
else
|
||||
mr1 |= MR1_PARITY_OFF;
|
||||
|
||||
/* Mark or space parity is not supported */
|
||||
tty->termios.c_cflag &= ~CMSPAR;
|
||||
|
||||
/* Set stop bits */
|
||||
if (cflag & CSTOPB)
|
||||
mr2 |= MR2_STOP_BITS_LENGTH_2;
|
||||
else
|
||||
mr2 |= MR2_STOP_BITS_LENGTH_1;
|
||||
|
||||
/* Set the flow control */
|
||||
switch (channel->board_id) {
|
||||
case IPACK1_DEVICE_ID_SBS_OCTAL_232:
|
||||
if (cflag & CRTSCTS) {
|
||||
mr1 |= MR1_RxRTS_CONTROL_ON;
|
||||
mr2 |= MR2_TxRTS_CONTROL_OFF | MR2_CTS_ENABLE_TX_ON;
|
||||
} else {
|
||||
mr1 |= MR1_RxRTS_CONTROL_OFF;
|
||||
mr2 |= MR2_TxRTS_CONTROL_OFF | MR2_CTS_ENABLE_TX_OFF;
|
||||
}
|
||||
break;
|
||||
case IPACK1_DEVICE_ID_SBS_OCTAL_422:
|
||||
mr1 |= MR1_RxRTS_CONTROL_OFF;
|
||||
mr2 |= MR2_TxRTS_CONTROL_OFF | MR2_CTS_ENABLE_TX_OFF;
|
||||
break;
|
||||
case IPACK1_DEVICE_ID_SBS_OCTAL_485:
|
||||
mr1 |= MR1_RxRTS_CONTROL_OFF;
|
||||
mr2 |= MR2_TxRTS_CONTROL_ON | MR2_CTS_ENABLE_TX_OFF;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
break;
|
||||
}
|
||||
|
||||
baud = tty_get_baud_rate(tty);
|
||||
tty_termios_encode_baud_rate(&tty->termios, baud, baud);
|
||||
|
||||
/* Set baud rate */
|
||||
switch (baud) {
|
||||
case 75:
|
||||
csr |= TX_CLK_75 | RX_CLK_75;
|
||||
break;
|
||||
case 110:
|
||||
csr |= TX_CLK_110 | RX_CLK_110;
|
||||
break;
|
||||
case 150:
|
||||
csr |= TX_CLK_150 | RX_CLK_150;
|
||||
break;
|
||||
case 300:
|
||||
csr |= TX_CLK_300 | RX_CLK_300;
|
||||
break;
|
||||
case 600:
|
||||
csr |= TX_CLK_600 | RX_CLK_600;
|
||||
break;
|
||||
case 1200:
|
||||
csr |= TX_CLK_1200 | RX_CLK_1200;
|
||||
break;
|
||||
case 1800:
|
||||
csr |= TX_CLK_1800 | RX_CLK_1800;
|
||||
break;
|
||||
case 2000:
|
||||
csr |= TX_CLK_2000 | RX_CLK_2000;
|
||||
break;
|
||||
case 2400:
|
||||
csr |= TX_CLK_2400 | RX_CLK_2400;
|
||||
break;
|
||||
case 4800:
|
||||
csr |= TX_CLK_4800 | RX_CLK_4800;
|
||||
break;
|
||||
case 9600:
|
||||
csr |= TX_CLK_9600 | RX_CLK_9600;
|
||||
break;
|
||||
case 19200:
|
||||
csr |= TX_CLK_19200 | RX_CLK_19200;
|
||||
break;
|
||||
case 38400:
|
||||
default:
|
||||
csr |= TX_CLK_38400 | RX_CLK_38400;
|
||||
/* In case of default, we establish 38400 bps */
|
||||
tty_termios_encode_baud_rate(&tty->termios, 38400, 38400);
|
||||
break;
|
||||
}
|
||||
|
||||
mr1 |= MR1_ERROR_CHAR;
|
||||
mr1 |= MR1_RxINT_RxRDY;
|
||||
|
||||
/* Write the control registers */
|
||||
iowrite8(mr1, &channel->regs->w.mr);
|
||||
iowrite8(mr2, &channel->regs->w.mr);
|
||||
iowrite8(csr, &channel->regs->w.csr);
|
||||
|
||||
/* Enable again the RX */
|
||||
iowrite8(CR_ENABLE_RX, &channel->regs->w.cr);
|
||||
}
|
||||
|
||||
static void ipoctal_hangup(struct tty_struct *tty)
|
||||
{
|
||||
unsigned long flags;
|
||||
struct ipoctal_channel *channel = tty->driver_data;
|
||||
|
||||
if (channel == NULL)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&channel->lock, flags);
|
||||
channel->nb_bytes = 0;
|
||||
channel->pointer_read = 0;
|
||||
channel->pointer_write = 0;
|
||||
spin_unlock_irqrestore(&channel->lock, flags);
|
||||
|
||||
tty_port_hangup(&channel->tty_port);
|
||||
|
||||
iowrite8(CR_DISABLE_RX | CR_DISABLE_TX, &channel->regs->w.cr);
|
||||
iowrite8(CR_CMD_RESET_RX, &channel->regs->w.cr);
|
||||
iowrite8(CR_CMD_RESET_TX, &channel->regs->w.cr);
|
||||
iowrite8(CR_CMD_RESET_ERR_STATUS, &channel->regs->w.cr);
|
||||
iowrite8(CR_CMD_RESET_MR, &channel->regs->w.cr);
|
||||
|
||||
clear_bit(ASYNCB_INITIALIZED, &channel->tty_port.flags);
|
||||
wake_up_interruptible(&channel->tty_port.open_wait);
|
||||
}
|
||||
|
||||
static const struct tty_operations ipoctal_fops = {
|
||||
.ioctl = NULL,
|
||||
.open = ipoctal_open,
|
||||
.close = ipoctal_close,
|
||||
.write = ipoctal_write_tty,
|
||||
.set_termios = ipoctal_set_termios,
|
||||
.write_room = ipoctal_write_room,
|
||||
.chars_in_buffer = ipoctal_chars_in_buffer,
|
||||
.get_icount = ipoctal_get_icount,
|
||||
.hangup = ipoctal_hangup,
|
||||
};
|
||||
|
||||
static int ipoctal_probe(struct ipack_device *dev)
|
||||
{
|
||||
int res;
|
||||
struct ipoctal *ipoctal;
|
||||
|
||||
ipoctal = kzalloc(sizeof(struct ipoctal), GFP_KERNEL);
|
||||
if (ipoctal == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
ipoctal->dev = dev;
|
||||
res = ipoctal_inst_slot(ipoctal, dev->bus->bus_nr, dev->slot);
|
||||
if (res)
|
||||
goto out_uninst;
|
||||
|
||||
dev_set_drvdata(&dev->dev, ipoctal);
|
||||
return 0;
|
||||
|
||||
out_uninst:
|
||||
kfree(ipoctal);
|
||||
return res;
|
||||
}
|
||||
|
||||
static void __ipoctal_remove(struct ipoctal *ipoctal)
|
||||
{
|
||||
int i;
|
||||
|
||||
ipoctal->dev->bus->ops->free_irq(ipoctal->dev);
|
||||
|
||||
for (i = 0; i < NR_CHANNELS; i++) {
|
||||
struct ipoctal_channel *channel = &ipoctal->channel[i];
|
||||
tty_unregister_device(ipoctal->tty_drv, i);
|
||||
tty_port_free_xmit_buf(&channel->tty_port);
|
||||
}
|
||||
|
||||
tty_unregister_driver(ipoctal->tty_drv);
|
||||
put_tty_driver(ipoctal->tty_drv);
|
||||
kfree(ipoctal);
|
||||
}
|
||||
|
||||
static void ipoctal_remove(struct ipack_device *idev)
|
||||
{
|
||||
__ipoctal_remove(dev_get_drvdata(&idev->dev));
|
||||
}
|
||||
|
||||
static DEFINE_IPACK_DEVICE_TABLE(ipoctal_ids) = {
|
||||
{ IPACK_DEVICE(IPACK_ID_VERSION_1, IPACK1_VENDOR_ID_SBS,
|
||||
IPACK1_DEVICE_ID_SBS_OCTAL_232) },
|
||||
{ IPACK_DEVICE(IPACK_ID_VERSION_1, IPACK1_VENDOR_ID_SBS,
|
||||
IPACK1_DEVICE_ID_SBS_OCTAL_422) },
|
||||
{ IPACK_DEVICE(IPACK_ID_VERSION_1, IPACK1_VENDOR_ID_SBS,
|
||||
IPACK1_DEVICE_ID_SBS_OCTAL_485) },
|
||||
{ 0, },
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(ipack, ipoctal_ids);
|
||||
|
||||
static const struct ipack_driver_ops ipoctal_drv_ops = {
|
||||
.probe = ipoctal_probe,
|
||||
.remove = ipoctal_remove,
|
||||
};
|
||||
|
||||
static struct ipack_driver driver = {
|
||||
.ops = &ipoctal_drv_ops,
|
||||
.id_table = ipoctal_ids,
|
||||
};
|
||||
|
||||
static int __init ipoctal_init(void)
|
||||
{
|
||||
return ipack_driver_register(&driver, THIS_MODULE, KBUILD_MODNAME);
|
||||
}
|
||||
|
||||
static void __exit ipoctal_exit(void)
|
||||
{
|
||||
ipack_driver_unregister(&driver);
|
||||
}
|
||||
|
||||
MODULE_DESCRIPTION("IP-Octal 232, 422 and 485 device driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
module_init(ipoctal_init);
|
||||
module_exit(ipoctal_exit);
|
||||
42
drivers/ipack/devices/ipoctal.h
Normal file
42
drivers/ipack/devices/ipoctal.h
Normal file
@@ -0,0 +1,42 @@
|
||||
/**
|
||||
* ipoctal.h
|
||||
*
|
||||
* driver for the IPOCTAL boards
|
||||
|
||||
* Copyright (C) 2009-2012 CERN (www.cern.ch)
|
||||
* Author: Nicolas Serafini, EIC2 SA
|
||||
* Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the Free
|
||||
* Software Foundation; version 2 of the License.
|
||||
*/
|
||||
|
||||
#ifndef _IPOCTAL_H
|
||||
#define _IPOCTAL_H_
|
||||
|
||||
#define NR_CHANNELS 8
|
||||
#define IPOCTAL_MAX_BOARDS 16
|
||||
#define MAX_DEVICES (NR_CHANNELS * IPOCTAL_MAX_BOARDS)
|
||||
#define RELEVANT_IFLAG(iflag) ((iflag) & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
|
||||
|
||||
/**
|
||||
* struct ipoctal_stats -- Stats since last reset
|
||||
*
|
||||
* @tx: Number of transmitted bytes
|
||||
* @rx: Number of received bytes
|
||||
* @overrun: Number of overrun errors
|
||||
* @parity_err: Number of parity errors
|
||||
* @framing_err: Number of framing errors
|
||||
* @rcv_break: Number of break received
|
||||
*/
|
||||
struct ipoctal_stats {
|
||||
unsigned long tx;
|
||||
unsigned long rx;
|
||||
unsigned long overrun_err;
|
||||
unsigned long parity_err;
|
||||
unsigned long framing_err;
|
||||
unsigned long rcv_break;
|
||||
};
|
||||
|
||||
#endif /* _IPOCTAL_H_ */
|
||||
228
drivers/ipack/devices/scc2698.h
Normal file
228
drivers/ipack/devices/scc2698.h
Normal file
@@ -0,0 +1,228 @@
|
||||
/*
|
||||
* scc2698.h
|
||||
*
|
||||
* driver for the IPOCTAL boards
|
||||
*
|
||||
* Copyright (C) 2009-2012 CERN (www.cern.ch)
|
||||
* Author: Nicolas Serafini, EIC2 SA
|
||||
* Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the Free
|
||||
* Software Foundation; version 2 of the License.
|
||||
*/
|
||||
|
||||
#ifndef SCC2698_H_
|
||||
#define SCC2698_H_
|
||||
|
||||
/*
|
||||
* union scc2698_channel - Channel access to scc2698 IO
|
||||
*
|
||||
* dn value are only spacer.
|
||||
*
|
||||
*/
|
||||
union scc2698_channel {
|
||||
struct {
|
||||
u8 d0, mr; /* Mode register 1/2*/
|
||||
u8 d1, sr; /* Status register */
|
||||
u8 d2, r1; /* reserved */
|
||||
u8 d3, rhr; /* Receive holding register (R) */
|
||||
u8 junk[8]; /* other crap for block control */
|
||||
} __packed r; /* Read access */
|
||||
struct {
|
||||
u8 d0, mr; /* Mode register 1/2 */
|
||||
u8 d1, csr; /* Clock select register */
|
||||
u8 d2, cr; /* Command register */
|
||||
u8 d3, thr; /* Transmit holding register */
|
||||
u8 junk[8]; /* other crap for block control */
|
||||
} __packed w; /* Write access */
|
||||
};
|
||||
|
||||
/*
|
||||
* union scc2698_block - Block access to scc2698 IO
|
||||
*
|
||||
* The scc2698 contain 4 block.
|
||||
* Each block containt two channel a and b.
|
||||
* dn value are only spacer.
|
||||
*
|
||||
*/
|
||||
union scc2698_block {
|
||||
struct {
|
||||
u8 d0, mra; /* Mode register 1/2 (a) */
|
||||
u8 d1, sra; /* Status register (a) */
|
||||
u8 d2, r1; /* reserved */
|
||||
u8 d3, rhra; /* Receive holding register (a) */
|
||||
u8 d4, ipcr; /* Input port change register of block */
|
||||
u8 d5, isr; /* Interrupt status register of block */
|
||||
u8 d6, ctur; /* Counter timer upper register of block */
|
||||
u8 d7, ctlr; /* Counter timer lower register of block */
|
||||
u8 d8, mrb; /* Mode register 1/2 (b) */
|
||||
u8 d9, srb; /* Status register (b) */
|
||||
u8 da, r2; /* reserved */
|
||||
u8 db, rhrb; /* Receive holding register (b) */
|
||||
u8 dc, r3; /* reserved */
|
||||
u8 dd, ip; /* Input port register of block */
|
||||
u8 de, ctg; /* Start counter timer of block */
|
||||
u8 df, cts; /* Stop counter timer of block */
|
||||
} __packed r; /* Read access */
|
||||
struct {
|
||||
u8 d0, mra; /* Mode register 1/2 (a) */
|
||||
u8 d1, csra; /* Clock select register (a) */
|
||||
u8 d2, cra; /* Command register (a) */
|
||||
u8 d3, thra; /* Transmit holding register (a) */
|
||||
u8 d4, acr; /* Auxiliary control register of block */
|
||||
u8 d5, imr; /* Interrupt mask register of block */
|
||||
u8 d6, ctu; /* Counter timer upper register of block */
|
||||
u8 d7, ctl; /* Counter timer lower register of block */
|
||||
u8 d8, mrb; /* Mode register 1/2 (b) */
|
||||
u8 d9, csrb; /* Clock select register (a) */
|
||||
u8 da, crb; /* Command register (b) */
|
||||
u8 db, thrb; /* Transmit holding register (b) */
|
||||
u8 dc, r1; /* reserved */
|
||||
u8 dd, opcr; /* Output port configuration register of block */
|
||||
u8 de, r2; /* reserved */
|
||||
u8 df, r3; /* reserved */
|
||||
} __packed w; /* Write access */
|
||||
};
|
||||
|
||||
#define MR1_CHRL_5_BITS (0x0 << 0)
|
||||
#define MR1_CHRL_6_BITS (0x1 << 0)
|
||||
#define MR1_CHRL_7_BITS (0x2 << 0)
|
||||
#define MR1_CHRL_8_BITS (0x3 << 0)
|
||||
#define MR1_PARITY_EVEN (0x1 << 2)
|
||||
#define MR1_PARITY_ODD (0x0 << 2)
|
||||
#define MR1_PARITY_ON (0x0 << 3)
|
||||
#define MR1_PARITY_FORCE (0x1 << 3)
|
||||
#define MR1_PARITY_OFF (0x2 << 3)
|
||||
#define MR1_PARITY_SPECIAL (0x3 << 3)
|
||||
#define MR1_ERROR_CHAR (0x0 << 5)
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#define MR1_ERROR_BLOCK (0x1 << 5)
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#define MR1_RxINT_RxRDY (0x0 << 6)
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#define MR1_RxINT_FFULL (0x1 << 6)
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#define MR1_RxRTS_CONTROL_ON (0x1 << 7)
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#define MR1_RxRTS_CONTROL_OFF (0x0 << 7)
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#define MR2_STOP_BITS_LENGTH_1 (0x7 << 0)
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#define MR2_STOP_BITS_LENGTH_2 (0xF << 0)
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#define MR2_CTS_ENABLE_TX_ON (0x1 << 4)
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#define MR2_CTS_ENABLE_TX_OFF (0x0 << 4)
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#define MR2_TxRTS_CONTROL_ON (0x1 << 5)
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#define MR2_TxRTS_CONTROL_OFF (0x0 << 5)
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#define MR2_CH_MODE_NORMAL (0x0 << 6)
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#define MR2_CH_MODE_ECHO (0x1 << 6)
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#define MR2_CH_MODE_LOCAL (0x2 << 6)
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#define MR2_CH_MODE_REMOTE (0x3 << 6)
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|
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#define CR_ENABLE_RX (0x1 << 0)
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#define CR_DISABLE_RX (0x1 << 1)
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#define CR_ENABLE_TX (0x1 << 2)
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#define CR_DISABLE_TX (0x1 << 3)
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#define CR_CMD_RESET_MR (0x1 << 4)
|
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#define CR_CMD_RESET_RX (0x2 << 4)
|
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#define CR_CMD_RESET_TX (0x3 << 4)
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#define CR_CMD_RESET_ERR_STATUS (0x4 << 4)
|
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#define CR_CMD_RESET_BREAK_CHANGE (0x5 << 4)
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#define CR_CMD_START_BREAK (0x6 << 4)
|
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#define CR_CMD_STOP_BREAK (0x7 << 4)
|
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#define CR_CMD_ASSERT_RTSN (0x8 << 4)
|
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#define CR_CMD_NEGATE_RTSN (0x9 << 4)
|
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#define CR_CMD_SET_TIMEOUT_MODE (0xA << 4)
|
||||
#define CR_CMD_DISABLE_TIMEOUT_MODE (0xC << 4)
|
||||
|
||||
#define SR_RX_READY (0x1 << 0)
|
||||
#define SR_FIFO_FULL (0x1 << 1)
|
||||
#define SR_TX_READY (0x1 << 2)
|
||||
#define SR_TX_EMPTY (0x1 << 3)
|
||||
#define SR_OVERRUN_ERROR (0x1 << 4)
|
||||
#define SR_PARITY_ERROR (0x1 << 5)
|
||||
#define SR_FRAMING_ERROR (0x1 << 6)
|
||||
#define SR_RECEIVED_BREAK (0x1 << 7)
|
||||
|
||||
#define SR_ERROR (0xF0)
|
||||
|
||||
#define ACR_DELTA_IP0_IRQ_EN (0x1 << 0)
|
||||
#define ACR_DELTA_IP1_IRQ_EN (0x1 << 1)
|
||||
#define ACR_DELTA_IP2_IRQ_EN (0x1 << 2)
|
||||
#define ACR_DELTA_IP3_IRQ_EN (0x1 << 3)
|
||||
#define ACR_CT_Mask (0x7 << 4)
|
||||
#define ACR_CExt (0x0 << 4)
|
||||
#define ACR_CTxCA (0x1 << 4)
|
||||
#define ACR_CTxCB (0x2 << 4)
|
||||
#define ACR_CClk16 (0x3 << 4)
|
||||
#define ACR_TExt (0x4 << 4)
|
||||
#define ACR_TExt16 (0x5 << 4)
|
||||
#define ACR_TClk (0x6 << 4)
|
||||
#define ACR_TClk16 (0x7 << 4)
|
||||
#define ACR_BRG_SET1 (0x0 << 7)
|
||||
#define ACR_BRG_SET2 (0x1 << 7)
|
||||
|
||||
#define TX_CLK_75 (0x0 << 0)
|
||||
#define TX_CLK_110 (0x1 << 0)
|
||||
#define TX_CLK_38400 (0x2 << 0)
|
||||
#define TX_CLK_150 (0x3 << 0)
|
||||
#define TX_CLK_300 (0x4 << 0)
|
||||
#define TX_CLK_600 (0x5 << 0)
|
||||
#define TX_CLK_1200 (0x6 << 0)
|
||||
#define TX_CLK_2000 (0x7 << 0)
|
||||
#define TX_CLK_2400 (0x8 << 0)
|
||||
#define TX_CLK_4800 (0x9 << 0)
|
||||
#define TX_CLK_1800 (0xA << 0)
|
||||
#define TX_CLK_9600 (0xB << 0)
|
||||
#define TX_CLK_19200 (0xC << 0)
|
||||
#define RX_CLK_75 (0x0 << 4)
|
||||
#define RX_CLK_110 (0x1 << 4)
|
||||
#define RX_CLK_38400 (0x2 << 4)
|
||||
#define RX_CLK_150 (0x3 << 4)
|
||||
#define RX_CLK_300 (0x4 << 4)
|
||||
#define RX_CLK_600 (0x5 << 4)
|
||||
#define RX_CLK_1200 (0x6 << 4)
|
||||
#define RX_CLK_2000 (0x7 << 4)
|
||||
#define RX_CLK_2400 (0x8 << 4)
|
||||
#define RX_CLK_4800 (0x9 << 4)
|
||||
#define RX_CLK_1800 (0xA << 4)
|
||||
#define RX_CLK_9600 (0xB << 4)
|
||||
#define RX_CLK_19200 (0xC << 4)
|
||||
|
||||
#define OPCR_MPOa_RTSN (0x0 << 0)
|
||||
#define OPCR_MPOa_C_TO (0x1 << 0)
|
||||
#define OPCR_MPOa_TxC1X (0x2 << 0)
|
||||
#define OPCR_MPOa_TxC16X (0x3 << 0)
|
||||
#define OPCR_MPOa_RxC1X (0x4 << 0)
|
||||
#define OPCR_MPOa_RxC16X (0x5 << 0)
|
||||
#define OPCR_MPOa_TxRDY (0x6 << 0)
|
||||
#define OPCR_MPOa_RxRDY_FF (0x7 << 0)
|
||||
|
||||
#define OPCR_MPOb_RTSN (0x0 << 4)
|
||||
#define OPCR_MPOb_C_TO (0x1 << 4)
|
||||
#define OPCR_MPOb_TxC1X (0x2 << 4)
|
||||
#define OPCR_MPOb_TxC16X (0x3 << 4)
|
||||
#define OPCR_MPOb_RxC1X (0x4 << 4)
|
||||
#define OPCR_MPOb_RxC16X (0x5 << 4)
|
||||
#define OPCR_MPOb_TxRDY (0x6 << 4)
|
||||
#define OPCR_MPOb_RxRDY_FF (0x7 << 4)
|
||||
|
||||
#define OPCR_MPP_INPUT (0x0 << 7)
|
||||
#define OPCR_MPP_OUTPUT (0x1 << 7)
|
||||
|
||||
#define IMR_TxRDY_A (0x1 << 0)
|
||||
#define IMR_RxRDY_FFULL_A (0x1 << 1)
|
||||
#define IMR_DELTA_BREAK_A (0x1 << 2)
|
||||
#define IMR_COUNTER_READY (0x1 << 3)
|
||||
#define IMR_TxRDY_B (0x1 << 4)
|
||||
#define IMR_RxRDY_FFULL_B (0x1 << 5)
|
||||
#define IMR_DELTA_BREAK_B (0x1 << 6)
|
||||
#define IMR_INPUT_PORT_CHANGE (0x1 << 7)
|
||||
|
||||
#define ISR_TxRDY_A (0x1 << 0)
|
||||
#define ISR_RxRDY_FFULL_A (0x1 << 1)
|
||||
#define ISR_DELTA_BREAK_A (0x1 << 2)
|
||||
#define ISR_COUNTER_READY (0x1 << 3)
|
||||
#define ISR_TxRDY_B (0x1 << 4)
|
||||
#define ISR_RxRDY_FFULL_B (0x1 << 5)
|
||||
#define ISR_DELTA_BREAK_B (0x1 << 6)
|
||||
#define ISR_INPUT_PORT_CHANGE (0x1 << 7)
|
||||
|
||||
#define ACK_INT_REQ0 0
|
||||
#define ACK_INT_REQ1 2
|
||||
|
||||
#endif /* SCC2698_H_ */
|
||||
Reference in New Issue
Block a user