ARM: OMAP5: Add minimal support for OMAP5430 SOC
OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and with an integrated L2 cache controller. OMAP5432 is another variant of OMAP5430, with a memory controller supporting DDR3 and SATA. Patch includes: - The machine specific headers and sources updates. - Platform header updates. - Minimum initialisation support for serial. - IO table init Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Santosh Shilimkar

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05e152c76a
@@ -60,12 +60,12 @@ omap_uart_lsr: .word 0
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beq 23f @ configure OMAP2UART3
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cmp \rp, #OMAP3UART3 @ only on 34xx
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beq 33f @ configure OMAP3UART3
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cmp \rp, #OMAP4UART3 @ only on 44xx
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beq 43f @ configure OMAP4UART3
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cmp \rp, #OMAP4UART3 @ only on 44xx/54xx
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beq 43f @ configure OMAP4/5UART3
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cmp \rp, #OMAP3UART4 @ only on 36xx
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beq 34f @ configure OMAP3UART4
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cmp \rp, #OMAP4UART4 @ only on 44xx
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beq 44f @ configure OMAP4UART4
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cmp \rp, #OMAP4UART4 @ only on 44xx/54xx
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beq 44f @ configure OMAP4/5UART4
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cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different
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beq 81f @ configure UART1
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cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different
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