tools/power turbostat: Baytrail c-state support
The Baytrail SOC, with its Silvermont core, has some unique properties: 1. a hardware CC1 residency counter 2. a module-c6 residency counter 3. a package-c6 counter at traditional package-c7 counter address. The SOC does not support c3, pc3, c7 or pc7 counters. Signed-off-by: Len Brown <len.brown@intel.com>
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@@ -147,6 +147,7 @@
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/* C-state Residency Counters */
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#define MSR_PKG_C3_RESIDENCY 0x000003f8
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#define MSR_PKG_C6_RESIDENCY 0x000003f9
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#define MSR_ATOM_PKG_C6_RESIDENCY 0x000003fa
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#define MSR_PKG_C7_RESIDENCY 0x000003fa
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#define MSR_CORE_C3_RESIDENCY 0x000003fc
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#define MSR_CORE_C6_RESIDENCY 0x000003fd
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@@ -203,6 +204,7 @@
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#define MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
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#define MSR_CORE_C1_RES 0x00000660
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#define MSR_MODULE_C6_RES_MS 0x00000664
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#define MSR_CC6_DEMOTION_POLICY_CONFIG 0x00000668
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#define MSR_MC6_DEMOTION_POLICY_CONFIG 0x00000669
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