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ARM: imx: support arm power off in cpuidle for i.mx6sx

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This patch introduces an independent cpuidle driver for
i.MX6SX, and supports arm power off in idle, totally
3 levels of cpuidle are supported as below:

1. ARM WFI;
2. SOC in WAIT mode;
3. SOC in WAIT mode + ARM power off.

ARM power off can save at least 5mW power.

This patch also replaces imx6q_enable_rbc with imx6_enable_rbc.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Anson Huang
2014-12-17 12:24:12 +08:00
committed by Shawn Guo
parent df096fde08
commit 05136f0897
7 changed files with 144 additions and 8 deletions
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6
arch/arm/mach-imx/pm-imx6.c
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@@ -205,7 +205,7 @@ void imx6q_set_int_mem_clk_lpm(bool enable)
writel_relaxed(val, ccm_base + CGPR);
}
static void imx6q_enable_rbc(bool enable)
void imx6_enable_rbc(bool enable)
{
u32 val;
@@ -359,7 +359,7 @@ static int imx6q_pm_enter(suspend_state_t state)
* RBC setting, so we do NOT need to do that here.
*/
if (!imx6_suspend_in_ocram_fn)
imx6q_enable_rbc(true);
imx6_enable_rbc(true);
imx_gpc_pre_suspend(true);
imx_anatop_pre_suspend();
/* Zzz ... */
@@ -368,7 +368,7 @@ static int imx6q_pm_enter(suspend_state_t state)
imx_smp_prepare();
imx_anatop_post_resume();
imx_gpc_post_resume();
imx6q_enable_rbc(false);
imx6_enable_rbc(false);
imx6q_enable_wb(false);
imx6q_set_int_mem_clk_lpm(true);
imx6q_set_lpm(WAIT_CLOCKED);