mmc: tmio: add flag to reduce delay after changing clock status
The docs for RCar Gen2 & 3 I have access to, mention delays of 5ms after stop and 1ms after start. Make it possible to apply these values. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Ulf Hansson

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@@ -65,6 +65,10 @@
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* Some controllers can support SDIO IRQ signalling.
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*/
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#define TMIO_MMC_SDIO_IRQ (1 << 2)
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/* Some controllers don't need to wait 10ms for clock changes */
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#define TMIO_MMC_FAST_CLK_CHG (1 << 3)
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/*
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* Some controllers require waiting for the SD bus to become
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* idle before writing to some registers.
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