Merge branch 'linus' into core/iommu
此提交包含在:
@@ -277,7 +277,6 @@ static struct cpufreq_driver p4clockmod_driver = {
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.name = "p4-clockmod",
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.owner = THIS_MODULE,
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.attr = p4clockmod_attr,
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.hide_interface = 1,
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};
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@@ -729,7 +729,7 @@ struct pebs_tracer *ds_request_pebs(struct task_struct *task,
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spin_unlock_irqrestore(&ds_lock, irq);
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ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
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ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
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ds_resume_pebs(tracer);
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return tracer;
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@@ -1029,5 +1029,4 @@ void ds_copy_thread(struct task_struct *tsk, struct task_struct *father)
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void ds_exit_thread(struct task_struct *tsk)
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{
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WARN_ON(tsk->thread.ds_ctx);
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}
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@@ -467,7 +467,7 @@ void __init efi_enter_virtual_mode(void)
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efi_memory_desc_t *md;
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efi_status_t status;
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unsigned long size;
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u64 end, systab, addr, npages;
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u64 end, systab, addr, npages, end_pfn;
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void *p, *va;
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efi.systab = NULL;
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@@ -479,7 +479,10 @@ void __init efi_enter_virtual_mode(void)
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size = md->num_pages << EFI_PAGE_SHIFT;
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end = md->phys_addr + size;
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if (PFN_UP(end) <= max_low_pfn_mapped)
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end_pfn = PFN_UP(end);
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if (end_pfn <= max_low_pfn_mapped
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|| (end_pfn > (1UL << (32 - PAGE_SHIFT))
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&& end_pfn <= max_pfn_mapped))
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va = __va(md->phys_addr);
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else
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va = efi_ioremap(md->phys_addr, size);
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@@ -99,24 +99,11 @@ void __init efi_call_phys_epilog(void)
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void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size)
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{
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static unsigned pages_mapped __initdata;
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unsigned i, pages;
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unsigned long offset;
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unsigned long last_map_pfn;
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pages = PFN_UP(phys_addr + size) - PFN_DOWN(phys_addr);
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offset = phys_addr & ~PAGE_MASK;
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phys_addr &= PAGE_MASK;
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if (pages_mapped + pages > MAX_EFI_IO_PAGES)
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last_map_pfn = init_memory_mapping(phys_addr, phys_addr + size);
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if ((last_map_pfn << PAGE_SHIFT) < phys_addr + size)
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return NULL;
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for (i = 0; i < pages; i++) {
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__set_fixmap(FIX_EFI_IO_MAP_FIRST_PAGE - pages_mapped,
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phys_addr, PAGE_KERNEL);
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phys_addr += PAGE_SIZE;
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pages_mapped++;
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}
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return (void __iomem *)__fix_to_virt(FIX_EFI_IO_MAP_FIRST_PAGE - \
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(pages_mapped - pages)) + offset;
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return (void __iomem *)__va(phys_addr);
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}
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@@ -136,7 +136,7 @@ int init_fpu(struct task_struct *tsk)
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#ifdef CONFIG_X86_32
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if (!HAVE_HWFP) {
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memset(tsk->thread.xstate, 0, xstate_size);
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finit();
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finit_task(tsk);
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set_stopped_child_used_math(tsk);
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return 0;
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}
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@@ -193,6 +193,9 @@ static int __kprobes can_boost(kprobe_opcode_t *opcodes)
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kprobe_opcode_t opcode;
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kprobe_opcode_t *orig_opcodes = opcodes;
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if (search_exception_tables(opcodes))
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return 0; /* Page fault may occur on this address. */
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retry:
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if (opcodes - orig_opcodes > MAX_INSN_SIZE - 1)
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return 0;
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@@ -217,6 +217,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
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DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
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},
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},
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{ /* Handle problems with rebooting on Dell XPS710 */
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.callback = set_bios_reboot,
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.ident = "Dell XPS710",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"),
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},
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},
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{ }
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};
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@@ -770,6 +770,9 @@ void __init setup_arch(char **cmdline_p)
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finish_e820_parsing();
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if (efi_enabled)
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efi_init();
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dmi_scan_machine();
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dmi_check_system(bad_bios_dmi_table);
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@@ -789,8 +792,6 @@ void __init setup_arch(char **cmdline_p)
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insert_resource(&iomem_resource, &data_resource);
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insert_resource(&iomem_resource, &bss_resource);
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if (efi_enabled)
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efi_init();
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#ifdef CONFIG_X86_32
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if (ppro_with_ram_bug()) {
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@@ -273,30 +273,43 @@ static unsigned long pit_calibrate_tsc(u32 latch, unsigned long ms, int loopmin)
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* use the TSC value at the transitions to calculate a pretty
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* good value for the TSC frequencty.
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*/
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static inline int pit_expect_msb(unsigned char val)
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static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *deltap)
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{
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int count = 0;
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int count;
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u64 tsc = 0;
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for (count = 0; count < 50000; count++) {
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/* Ignore LSB */
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inb(0x42);
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if (inb(0x42) != val)
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break;
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tsc = get_cycles();
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}
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return count > 50;
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*deltap = get_cycles() - tsc;
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*tscp = tsc;
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/*
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* We require _some_ success, but the quality control
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* will be based on the error terms on the TSC values.
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*/
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return count > 5;
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}
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/*
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* How many MSB values do we want to see? We aim for a
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* 15ms calibration, which assuming a 2us counter read
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* error should give us roughly 150 ppm precision for
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* the calibration.
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* How many MSB values do we want to see? We aim for
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* a maximum error rate of 500ppm (in practice the
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* real error is much smaller), but refuse to spend
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* more than 25ms on it.
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*/
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#define QUICK_PIT_MS 15
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#define QUICK_PIT_ITERATIONS (QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256)
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#define MAX_QUICK_PIT_MS 25
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#define MAX_QUICK_PIT_ITERATIONS (MAX_QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256)
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static unsigned long quick_pit_calibrate(void)
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{
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int i;
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u64 tsc, delta;
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unsigned long d1, d2;
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/* Set the Gate high, disable speaker */
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outb((inb(0x61) & ~0x02) | 0x01, 0x61);
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@@ -315,45 +328,52 @@ static unsigned long quick_pit_calibrate(void)
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outb(0xff, 0x42);
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outb(0xff, 0x42);
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if (pit_expect_msb(0xff)) {
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int i;
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u64 t1, t2, delta;
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unsigned char expect = 0xfe;
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/*
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* The PIT starts counting at the next edge, so we
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* need to delay for a microsecond. The easiest way
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* to do that is to just read back the 16-bit counter
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* once from the PIT.
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*/
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inb(0x42);
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inb(0x42);
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t1 = get_cycles();
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for (i = 0; i < QUICK_PIT_ITERATIONS; i++, expect--) {
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if (!pit_expect_msb(expect))
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goto failed;
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if (pit_expect_msb(0xff, &tsc, &d1)) {
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for (i = 1; i <= MAX_QUICK_PIT_ITERATIONS; i++) {
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if (!pit_expect_msb(0xff-i, &delta, &d2))
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break;
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/*
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* Iterate until the error is less than 500 ppm
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*/
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delta -= tsc;
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if (d1+d2 < delta >> 11)
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goto success;
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}
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t2 = get_cycles();
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/*
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* Make sure we can rely on the second TSC timestamp:
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*/
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if (!pit_expect_msb(expect))
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goto failed;
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/*
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* Ok, if we get here, then we've seen the
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* MSB of the PIT decrement QUICK_PIT_ITERATIONS
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* times, and each MSB had many hits, so we never
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* had any sudden jumps.
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*
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* As a result, we can depend on there not being
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* any odd delays anywhere, and the TSC reads are
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* reliable.
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*
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* kHz = ticks / time-in-seconds / 1000;
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* kHz = (t2 - t1) / (QPI * 256 / PIT_TICK_RATE) / 1000
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* kHz = ((t2 - t1) * PIT_TICK_RATE) / (QPI * 256 * 1000)
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*/
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delta = (t2 - t1)*PIT_TICK_RATE;
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do_div(delta, QUICK_PIT_ITERATIONS*256*1000);
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printk("Fast TSC calibration using PIT\n");
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return delta;
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}
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failed:
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printk("Fast TSC calibration failed\n");
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return 0;
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success:
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/*
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* Ok, if we get here, then we've seen the
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* MSB of the PIT decrement 'i' times, and the
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* error has shrunk to less than 500 ppm.
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*
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* As a result, we can depend on there not being
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* any odd delays anywhere, and the TSC reads are
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* reliable (within the error). We also adjust the
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* delta to the middle of the error bars, just
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* because it looks nicer.
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*
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* kHz = ticks / time-in-seconds / 1000;
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* kHz = (t2 - t1) / (I * 256 / PIT_TICK_RATE) / 1000
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* kHz = ((t2 - t1) * PIT_TICK_RATE) / (I * 256 * 1000)
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*/
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delta += (long)(d2 - d1)/2;
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delta *= PIT_TICK_RATE;
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do_div(delta, i*256*1000);
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printk("Fast TSC calibration using PIT\n");
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return delta;
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}
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/**
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