Merge tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul: - Move Dmaengine DT bindings to YAML and convert Allwinner to schema. - FSL dma device_synchronize implementation - DW split acpi and of helpers and updates to driver and support for Elkhart Lake - Move filter fn as private for omap-dma and edma drivers and improvements to these drivers - Mark expected switch fall-through in couple of drivers - Renames of shdma and nbpfaxi binding document - Minor updates to bunch of drivers * tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (55 commits) dmaengine: ti: edma: Use bitmap_set() instead of open coded edma_set_bits() dmaengine: ti: edma: Only reset region0 access registers dmaengine: ti: edma: Do not reset reserved paRAM slots dmaengine: iop-adma.c: fix printk format warning dmaengine: stm32-dma: Use struct_size() helper dt-bindings: dmaengine: dma-common: Fix the dma-channel-mask property dmanegine: ioat/dca: Use struct_size() helper dmaengine: iop-adma: remove set but not used variable 'slots_per_op' dmaengine: dmatest: Add support for completion polling dmaengine: ti: omap-dma: Remove variable override in omap_dma_tx_status() dmaengine: ti: omap-dma: Remove 'Assignment in if condition' dmaengine: ti: edma: Remove 'Assignment in if condition' dmaengine: dw: platform: Split OF helpers to separate module dmaengine: dw: platform: Split ACPI helpers to separate module dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register() dmaengine: dw: platform: Switch to acpi_dma_controller_register() dmaengine: dw: platform: Use devm_platform_ioremap_resource() dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake dmaengine: dw: platform: Use struct dw_dma_chip_pdata dmaengine: dw: Export struct dw_dma_chip_pdata for wider use ...
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@@ -116,9 +116,9 @@ static void __iop_adma_slot_cleanup(struct iop_adma_chan *iop_chan)
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list_for_each_entry_safe(iter, _iter, &iop_chan->chain,
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chain_node) {
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pr_debug("\tcookie: %d slot: %d busy: %d "
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"this_desc: %#x next_desc: %#llx ack: %d\n",
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"this_desc: %pad next_desc: %#llx ack: %d\n",
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iter->async_tx.cookie, iter->idx, busy,
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iter->async_tx.phys, (u64)iop_desc_get_next_desc(iter),
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&iter->async_tx.phys, (u64)iop_desc_get_next_desc(iter),
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async_tx_test_ack(&iter->async_tx));
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prefetch(_iter);
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prefetch(&_iter->async_tx);
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@@ -364,13 +364,11 @@ iop_adma_tx_submit(struct dma_async_tx_descriptor *tx)
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struct iop_adma_chan *iop_chan = to_iop_adma_chan(tx->chan);
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struct iop_adma_desc_slot *grp_start, *old_chain_tail;
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int slot_cnt;
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int slots_per_op;
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dma_cookie_t cookie;
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dma_addr_t next_dma;
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grp_start = sw_desc->group_head;
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slot_cnt = grp_start->slot_cnt;
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slots_per_op = grp_start->slots_per_op;
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spin_lock_bh(&iop_chan->lock);
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cookie = dma_cookie_assign(tx);
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