Merge tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul: - Move Dmaengine DT bindings to YAML and convert Allwinner to schema. - FSL dma device_synchronize implementation - DW split acpi and of helpers and updates to driver and support for Elkhart Lake - Move filter fn as private for omap-dma and edma drivers and improvements to these drivers - Mark expected switch fall-through in couple of drivers - Renames of shdma and nbpfaxi binding document - Minor updates to bunch of drivers * tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (55 commits) dmaengine: ti: edma: Use bitmap_set() instead of open coded edma_set_bits() dmaengine: ti: edma: Only reset region0 access registers dmaengine: ti: edma: Do not reset reserved paRAM slots dmaengine: iop-adma.c: fix printk format warning dmaengine: stm32-dma: Use struct_size() helper dt-bindings: dmaengine: dma-common: Fix the dma-channel-mask property dmanegine: ioat/dca: Use struct_size() helper dmaengine: iop-adma: remove set but not used variable 'slots_per_op' dmaengine: dmatest: Add support for completion polling dmaengine: ti: omap-dma: Remove variable override in omap_dma_tx_status() dmaengine: ti: omap-dma: Remove 'Assignment in if condition' dmaengine: ti: edma: Remove 'Assignment in if condition' dmaengine: dw: platform: Split OF helpers to separate module dmaengine: dw: platform: Split ACPI helpers to separate module dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register() dmaengine: dw: platform: Switch to acpi_dma_controller_register() dmaengine: dw: platform: Use devm_platform_ioremap_resource() dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake dmaengine: dw: platform: Use struct dw_dma_chip_pdata dmaengine: dw: Export struct dw_dma_chip_pdata for wider use ...
This commit is contained in:
Linus Torvalds
@@ -0,0 +1,55 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/allwinner,sun4i-a10-dma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 DMA Controller Device Tree Bindings
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||||
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maintainers:
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||||
- Chen-Yu Tsai <wens@csie.org>
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||||
- Maxime Ripard <maxime.ripard@bootlin.com>
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||||
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allOf:
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- $ref: "dma-controller.yaml#"
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properties:
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"#dma-cells":
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const: 2
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description:
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The first cell is either 0 or 1, the former to use the normal
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DMA, 1 for dedicated DMA. The second cell is the request line
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number.
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compatible:
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const: allwinner,sun4i-a10-dma
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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required:
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- "#dma-cells"
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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dma: dma-controller@1c02000 {
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compatible = "allwinner,sun4i-a10-dma";
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reg = <0x01c02000 0x1000>;
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interrupts = <27>;
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clocks = <&ahb_gates 6>;
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#dma-cells = <2>;
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};
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...
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@@ -0,0 +1,88 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/allwinner,sun50i-a64-dma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A64 DMA Controller Device Tree Bindings
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <maxime.ripard@bootlin.com>
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allOf:
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- $ref: "dma-controller.yaml#"
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properties:
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"#dma-cells":
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const: 1
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description: The cell is the request line number.
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compatible:
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enum:
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- allwinner,sun50i-a64-dma
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- allwinner,sun50i-h6-dma
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 2
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clock-names:
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items:
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- const: bus
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- const: mbus
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resets:
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maxItems: 1
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|
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required:
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- "#dma-cells"
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- compatible
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- reg
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- interrupts
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- clocks
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- resets
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- dma-channels
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|
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if:
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properties:
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compatible:
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const: allwinner,sun50i-h6-dma
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then:
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properties:
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clocks:
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maxItems: 2
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required:
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- clock-names
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else:
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properties:
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clocks:
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maxItems: 1
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# FIXME: We should set it, but it would report all the generic
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# properties as additional properties.
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# additionalProperties: false
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examples:
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- |
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dma: dma-controller@1c02000 {
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compatible = "allwinner,sun50i-a64-dma";
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reg = <0x01c02000 0x1000>;
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interrupts = <0 50 4>;
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clocks = <&ccu 30>;
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dma-channels = <8>;
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dma-requests = <27>;
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resets = <&ccu 7>;
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#dma-cells = <1>;
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};
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|
||||
...
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@@ -0,0 +1,62 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/allwinner,sun6i-a31-dma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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|
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title: Allwinner A31 DMA Controller Device Tree Bindings
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|
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maintainers:
|
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- Chen-Yu Tsai <wens@csie.org>
|
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- Maxime Ripard <maxime.ripard@bootlin.com>
|
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|
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allOf:
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- $ref: "dma-controller.yaml#"
|
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|
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properties:
|
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"#dma-cells":
|
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const: 1
|
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description: The cell is the request line number.
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|
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compatible:
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oneOf:
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- const: allwinner,sun6i-a31-dma
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- const: allwinner,sun8i-a23-dma
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- const: allwinner,sun8i-a83t-dma
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- const: allwinner,sun8i-h3-dma
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- const: allwinner,sun8i-v3s-dma
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|
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reg:
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maxItems: 1
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||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
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||||
|
||||
resets:
|
||||
maxItems: 1
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||||
|
||||
required:
|
||||
- "#dma-cells"
|
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- compatible
|
||||
- reg
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- interrupts
|
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- clocks
|
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- resets
|
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|
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additionalProperties: false
|
||||
|
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examples:
|
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- |
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dma: dma-controller@1c02000 {
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compatible = "allwinner,sun6i-a31-dma";
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reg = <0x01c02000 0x1000>;
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interrupts = <0 50 4>;
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clocks = <&ahb1_gates 6>;
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resets = <&ahb1_rst 6>;
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#dma-cells = <1>;
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||||
};
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|
||||
...
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45
Documentation/devicetree/bindings/dma/dma-common.yaml
Normal file
45
Documentation/devicetree/bindings/dma/dma-common.yaml
Normal file
@@ -0,0 +1,45 @@
|
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# SPDX-License-Identifier: GPL-2.0
|
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%YAML 1.2
|
||||
---
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||||
$id: http://devicetree.org/schemas/dma/dma-common.yaml#
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||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
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|
||||
title: DMA Engine Generic Binding
|
||||
|
||||
maintainers:
|
||||
- Vinod Koul <vkoul@kernel.org>
|
||||
|
||||
description:
|
||||
Generic binding to provide a way for a driver using DMA Engine to
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retrieve the DMA request or channel information that goes from a
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hardware device to a DMA controller.
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|
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select: false
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|
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properties:
|
||||
"#dma-cells":
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minimum: 1
|
||||
# Should be enough
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||||
maximum: 255
|
||||
description:
|
||||
Used to provide DMA controller specific information.
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|
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dma-channel-mask:
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$ref: /schemas/types.yaml#definitions/uint32
|
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description:
|
||||
Bitmask of available DMA channels in ascending order that are
|
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not reserved by firmware and are available to the
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||||
kernel. i.e. first channel corresponds to LSB.
|
||||
|
||||
dma-channels:
|
||||
$ref: /schemas/types.yaml#definitions/uint32
|
||||
description:
|
||||
Number of DMA channels supported by the controller.
|
||||
|
||||
dma-requests:
|
||||
$ref: /schemas/types.yaml#definitions/uint32
|
||||
description:
|
||||
Number of DMA request signals supported by the controller.
|
||||
|
||||
required:
|
||||
- "#dma-cells"
|
||||
35
Documentation/devicetree/bindings/dma/dma-controller.yaml
Normal file
35
Documentation/devicetree/bindings/dma/dma-controller.yaml
Normal file
@@ -0,0 +1,35 @@
|
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# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/dma/dma-controller.yaml#
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||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: DMA Controller Generic Binding
|
||||
|
||||
maintainers:
|
||||
- Vinod Koul <vkoul@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: "dma-common.yaml#"
|
||||
|
||||
# Everything else is described in the common file
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^dma-controller(@.*)?$"
|
||||
|
||||
examples:
|
||||
- |
|
||||
dma: dma-controller@48000000 {
|
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compatible = "ti,omap-sdma";
|
||||
reg = <0x48000000 0x1000>;
|
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interrupts = <0 12 0x4
|
||||
0 13 0x4
|
||||
0 14 0x4
|
||||
0 15 0x4>;
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||||
#dma-cells = <1>;
|
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dma-channels = <32>;
|
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dma-requests = <127>;
|
||||
dma-channel-mask = <0xfffe>;
|
||||
};
|
||||
|
||||
...
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||||
50
Documentation/devicetree/bindings/dma/dma-router.yaml
Normal file
50
Documentation/devicetree/bindings/dma/dma-router.yaml
Normal file
@@ -0,0 +1,50 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/dma/dma-router.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: DMA Router Generic Binding
|
||||
|
||||
maintainers:
|
||||
- Vinod Koul <vkoul@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: "dma-common.yaml#"
|
||||
|
||||
description:
|
||||
DMA routers are transparent IP blocks used to route DMA request
|
||||
lines from devices to the DMA controller. Some SoCs (like TI DRA7x)
|
||||
have more peripherals integrated with DMA requests than what the DMA
|
||||
controller can handle directly.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^dma-router(@.*)?$"
|
||||
|
||||
dma-masters:
|
||||
$ref: /schemas/types.yaml#definitions/phandle-array
|
||||
description:
|
||||
Array of phandles to the DMA controllers the router can direct
|
||||
the signal to.
|
||||
|
||||
dma-requests:
|
||||
description:
|
||||
Number of incoming request lines the router can handle.
|
||||
|
||||
required:
|
||||
- "#dma-cells"
|
||||
- dma-masters
|
||||
|
||||
examples:
|
||||
- |
|
||||
sdma_xbar: dma-router@4a002b78 {
|
||||
compatible = "ti,dra7-dma-crossbar";
|
||||
reg = <0x4a002b78 0xfc>;
|
||||
#dma-cells = <1>;
|
||||
dma-requests = <205>;
|
||||
ti,dma-safe-map = <0>;
|
||||
dma-masters = <&sdma>;
|
||||
};
|
||||
|
||||
...
|
||||
@@ -1,113 +1 @@
|
||||
* Generic DMA Controller and DMA request bindings
|
||||
|
||||
Generic binding to provide a way for a driver using DMA Engine to retrieve the
|
||||
DMA request or channel information that goes from a hardware device to a DMA
|
||||
controller.
|
||||
|
||||
|
||||
* DMA controller
|
||||
|
||||
Required property:
|
||||
- #dma-cells: Must be at least 1. Used to provide DMA controller
|
||||
specific information. See DMA client binding below for
|
||||
more details.
|
||||
|
||||
Optional properties:
|
||||
- dma-channels: Number of DMA channels supported by the controller.
|
||||
- dma-requests: Number of DMA request signals supported by the
|
||||
controller.
|
||||
- dma-channel-mask: Bitmask of available DMA channels in ascending order
|
||||
that are not reserved by firmware and are available to
|
||||
the kernel. i.e. first channel corresponds to LSB.
|
||||
|
||||
Example:
|
||||
|
||||
dma: dma@48000000 {
|
||||
compatible = "ti,omap-sdma";
|
||||
reg = <0x48000000 0x1000>;
|
||||
interrupts = <0 12 0x4
|
||||
0 13 0x4
|
||||
0 14 0x4
|
||||
0 15 0x4>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <127>;
|
||||
dma-channel-mask = <0xfffe>
|
||||
};
|
||||
|
||||
* DMA router
|
||||
|
||||
DMA routers are transparent IP blocks used to route DMA request lines from
|
||||
devices to the DMA controller. Some SoCs (like TI DRA7x) have more peripherals
|
||||
integrated with DMA requests than what the DMA controller can handle directly.
|
||||
|
||||
Required property:
|
||||
- dma-masters: phandle of the DMA controller or list of phandles for
|
||||
the DMA controllers the router can direct the signal to.
|
||||
- #dma-cells: Must be at least 1. Used to provide DMA router specific
|
||||
information. See DMA client binding below for more
|
||||
details.
|
||||
|
||||
Optional properties:
|
||||
- dma-requests: Number of incoming request lines the router can handle.
|
||||
- In the node pointed by the dma-masters:
|
||||
- dma-requests: The router driver might need to look for this in order
|
||||
to configure the routing.
|
||||
|
||||
Example:
|
||||
sdma_xbar: dma-router@4a002b78 {
|
||||
compatible = "ti,dra7-dma-crossbar";
|
||||
reg = <0x4a002b78 0xfc>;
|
||||
#dma-cells = <1>;
|
||||
dma-requests = <205>;
|
||||
ti,dma-safe-map = <0>;
|
||||
dma-masters = <&sdma>;
|
||||
};
|
||||
|
||||
* DMA client
|
||||
|
||||
Client drivers should specify the DMA property using a phandle to the controller
|
||||
followed by DMA controller specific data.
|
||||
|
||||
Required property:
|
||||
- dmas: List of one or more DMA specifiers, each consisting of
|
||||
- A phandle pointing to DMA controller node
|
||||
- A number of integer cells, as determined by the
|
||||
#dma-cells property in the node referenced by phandle
|
||||
containing DMA controller specific information. This
|
||||
typically contains a DMA request line number or a
|
||||
channel number, but can contain any data that is
|
||||
required for configuring a channel.
|
||||
- dma-names: Contains one identifier string for each DMA specifier in
|
||||
the dmas property. The specific strings that can be used
|
||||
are defined in the binding of the DMA client device.
|
||||
Multiple DMA specifiers can be used to represent
|
||||
alternatives and in this case the dma-names for those
|
||||
DMA specifiers must be identical (see examples).
|
||||
|
||||
Examples:
|
||||
|
||||
1. A device with one DMA read channel, one DMA write channel:
|
||||
|
||||
i2c1: i2c@1 {
|
||||
...
|
||||
dmas = <&dma 2 /* read channel */
|
||||
&dma 3>; /* write channel */
|
||||
dma-names = "rx", "tx";
|
||||
...
|
||||
};
|
||||
|
||||
2. A single read-write channel with three alternative DMA controllers:
|
||||
|
||||
dmas = <&dma1 5
|
||||
&dma2 7
|
||||
&dma3 2>;
|
||||
dma-names = "rx-tx", "rx-tx", "rx-tx";
|
||||
|
||||
3. A device with three channels, one of which has two alternatives:
|
||||
|
||||
dmas = <&dma1 2 /* read channel */
|
||||
&dma1 3 /* write channel */
|
||||
&dma2 0 /* error read */
|
||||
&dma3 0>; /* alternative error read */
|
||||
dma-names = "rx", "tx", "error", "error";
|
||||
This file has been moved to dma-controller.yaml.
|
||||
|
||||
@@ -1,45 +0,0 @@
|
||||
Allwinner A10 DMA Controller
|
||||
|
||||
This driver follows the generic DMA bindings defined in dma.txt.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Must be "allwinner,sun4i-a10-dma"
|
||||
- reg: Should contain the registers base address and length
|
||||
- interrupts: Should contain a reference to the interrupt used by this device
|
||||
- clocks: Should contain a reference to the parent AHB clock
|
||||
- #dma-cells : Should be 2, first cell denoting normal or dedicated dma,
|
||||
second cell holding the request line number.
|
||||
|
||||
Example:
|
||||
dma: dma-controller@1c02000 {
|
||||
compatible = "allwinner,sun4i-a10-dma";
|
||||
reg = <0x01c02000 0x1000>;
|
||||
interrupts = <27>;
|
||||
clocks = <&ahb_gates 6>;
|
||||
#dma-cells = <2>;
|
||||
};
|
||||
|
||||
Clients:
|
||||
|
||||
DMA clients connected to the Allwinner A10 DMA controller must use the
|
||||
format described in the dma.txt file, using a three-cell specifier for
|
||||
each channel: a phandle plus two integer cells.
|
||||
The three cells in order are:
|
||||
|
||||
1. A phandle pointing to the DMA controller.
|
||||
2. Whether it is using normal (0) or dedicated (1) channels
|
||||
3. The port ID as specified in the datasheet
|
||||
|
||||
Example:
|
||||
spi2: spi@1c17000 {
|
||||
compatible = "allwinner,sun4i-a10-spi";
|
||||
reg = <0x01c17000 0x1000>;
|
||||
interrupts = <0 12 4>;
|
||||
clocks = <&ahb_gates 22>, <&spi2_clk>;
|
||||
clock-names = "ahb", "mod";
|
||||
dmas = <&dma 1 29>, <&dma 1 28>;
|
||||
dma-names = "rx", "tx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
@@ -1,81 +0,0 @@
|
||||
Allwinner A31 DMA Controller
|
||||
|
||||
This driver follows the generic DMA bindings defined in dma.txt.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Must be one of
|
||||
"allwinner,sun6i-a31-dma"
|
||||
"allwinner,sun8i-a23-dma"
|
||||
"allwinner,sun8i-a83t-dma"
|
||||
"allwinner,sun8i-h3-dma"
|
||||
"allwinner,sun8i-v3s-dma"
|
||||
- reg: Should contain the registers base address and length
|
||||
- interrupts: Should contain a reference to the interrupt used by this device
|
||||
- clocks: Should contain a reference to the parent AHB clock
|
||||
- resets: Should contain a reference to the reset controller asserting
|
||||
this device in reset
|
||||
- #dma-cells : Should be 1, a single cell holding a line request number
|
||||
|
||||
Example:
|
||||
dma: dma-controller@1c02000 {
|
||||
compatible = "allwinner,sun6i-a31-dma";
|
||||
reg = <0x01c02000 0x1000>;
|
||||
interrupts = <0 50 4>;
|
||||
clocks = <&ahb1_gates 6>;
|
||||
resets = <&ahb1_rst 6>;
|
||||
#dma-cells = <1>;
|
||||
};
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
For A64 and H6 DMA controller:
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be one of
|
||||
"allwinner,sun50i-a64-dma"
|
||||
"allwinner,sun50i-h6-dma"
|
||||
- dma-channels: Number of DMA channels supported by the controller.
|
||||
Refer to Documentation/devicetree/bindings/dma/dma.txt
|
||||
- clocks: In addition to parent AHB clock, it should also contain mbus
|
||||
clock (H6 only)
|
||||
- clock-names: Should contain "bus" and "mbus" (H6 only)
|
||||
- all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells
|
||||
|
||||
Optional properties:
|
||||
- dma-requests: Number of DMA request signals supported by the controller.
|
||||
Refer to Documentation/devicetree/bindings/dma/dma.txt
|
||||
|
||||
Example:
|
||||
dma: dma-controller@1c02000 {
|
||||
compatible = "allwinner,sun50i-a64-dma";
|
||||
reg = <0x01c02000 0x1000>;
|
||||
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_DMA>;
|
||||
dma-channels = <8>;
|
||||
dma-requests = <27>;
|
||||
resets = <&ccu RST_BUS_DMA>;
|
||||
#dma-cells = <1>;
|
||||
};
|
||||
------------------------------------------------------------------------------
|
||||
|
||||
Clients:
|
||||
|
||||
DMA clients connected to the A31 DMA controller must use the format
|
||||
described in the dma.txt file, using a two-cell specifier for each
|
||||
channel: a phandle plus one integer cells.
|
||||
The two cells in order are:
|
||||
|
||||
1. A phandle pointing to the DMA controller.
|
||||
2. The port ID as specified in the datasheet
|
||||
|
||||
Example:
|
||||
spi2: spi@1c6a000 {
|
||||
compatible = "allwinner,sun6i-a31-spi";
|
||||
reg = <0x01c6a000 0x1000>;
|
||||
interrupts = <0 67 4>;
|
||||
clocks = <&ahb1_gates 22>, <&spi2_clk>;
|
||||
clock-names = "ahb", "mod";
|
||||
dmas = <&dma 25>, <&dma 25>;
|
||||
dma-names = "rx", "tx";
|
||||
resets = <&ahb1_rst 22>;
|
||||
};
|
||||
Reference in New Issue
Block a user