Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner: "The irq department delivers: - Expand the generic infrastructure handling the irq migration on CPU hotplug and convert X86 over to it. (Thomas Gleixner) Aside of consolidating code this is a preparatory change for: - Finalizing the affinity management for multi-queue devices. The main change here is to shut down interrupts which are affine to a outgoing CPU and reenabling them when the CPU comes online again. That avoids moving interrupts pointlessly around and breaking and reestablishing affinities for no value. (Christoph Hellwig) Note: This contains also the BLOCK-MQ and NVME changes which depend on the rework of the irq core infrastructure. Jens acked them and agreed that they should go with the irq changes. - Consolidation of irq domain code (Marc Zyngier) - State tracking consolidation in the core code (Jeffy Chen) - Add debug infrastructure for hierarchical irq domains (Thomas Gleixner) - Infrastructure enhancement for managing generic interrupt chips via devmem (Bartosz Golaszewski) - Constification work all over the place (Tobias Klauser) - Two new interrupt controller drivers for MVEBU (Thomas Petazzoni) - The usual set of fixes, updates and enhancements all over the place" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (112 commits) irqchip/or1k-pic: Fix interrupt acknowledgement irqchip/irq-mvebu-gicp: Allocate enough memory for spi_bitmap irqchip/gic-v3: Fix out-of-bound access in gic_set_affinity nvme: Allocate queues for all possible CPUs blk-mq: Create hctx for each present CPU blk-mq: Include all present CPUs in the default queue mapping genirq: Avoid unnecessary low level irq function calls genirq: Set irq masked state when initializing irq_desc genirq/timings: Add infrastructure for estimating the next interrupt arrival time genirq/timings: Add infrastructure to track the interrupt timings genirq/debugfs: Remove pointless NULL pointer check irqchip/gic-v3-its: Don't assume GICv3 hardware supports 16bit INTID irqchip/gic-v3-its: Add ACPI NUMA node mapping irqchip/gic-v3-its-platform-msi: Make of_device_ids const irqchip/gic-v3-its: Make of_device_ids const irqchip/irq-mvebu-icu: Add new driver for Marvell ICU irqchip/irq-mvebu-gicp: Add new driver for Marvell GICP dt-bindings/interrupt-controller: Add DT binding for the Marvell ICU genirq/irqdomain: Remove auto-recursive hierarchy support irqchip/MSI: Use irq_domain_update_bus_token instead of an open coded access ...
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@@ -554,6 +554,7 @@ static int vmd_find_free_domain(void)
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static int vmd_enable_domain(struct vmd_dev *vmd)
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{
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struct pci_sysdata *sd = &vmd->sysdata;
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struct fwnode_handle *fn;
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struct resource *res;
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u32 upper_bits;
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unsigned long flags;
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@@ -617,8 +618,13 @@ static int vmd_enable_domain(struct vmd_dev *vmd)
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sd->node = pcibus_to_node(vmd->dev->bus);
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vmd->irq_domain = pci_msi_create_irq_domain(NULL, &vmd_msi_domain_info,
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fn = irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.domain);
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if (!fn)
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return -ENODEV;
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vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info,
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x86_vector_domain);
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irq_domain_free_fwnode(fn);
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if (!vmd->irq_domain)
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return -ENODEV;
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@@ -1463,7 +1463,7 @@ struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
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if (!domain)
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return NULL;
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domain->bus_token = DOMAIN_BUS_PCI_MSI;
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irq_domain_update_bus_token(domain, DOMAIN_BUS_PCI_MSI);
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return domain;
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}
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EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain);
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