Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Fun set of conflict resolutions here... For the mac80211 stuff, these were fortunately just parallel adds. Trivially resolved. In drivers/net/phy/phy.c we had a bug fix in 'net' that moved the function phy_disable_interrupts() earlier in the file, whilst in 'net-next' the phy_error() call from this function was removed. In net/ipv4/xfrm4_policy.c, David Ahern's changes to remove the 'rt_table_id' member of rtable collided with a bug fix in 'net' that added a new struct member "rt_mtu_locked" which needs to be copied over here. The mlxsw driver conflict consisted of net-next separating the span code and definitions into separate files, whilst a 'net' bug fix made some changes to that moved code. The mlx5 infiniband conflict resolution was quite non-trivial, the RDMA tree's merge commit was used as a guide here, and here are their notes: ==================== Due to bug fixes found by the syzkaller bot and taken into the for-rc branch after development for the 4.17 merge window had already started being taken into the for-next branch, there were fairly non-trivial merge issues that would need to be resolved between the for-rc branch and the for-next branch. This merge resolves those conflicts and provides a unified base upon which ongoing development for 4.17 can be based. Conflicts: drivers/infiniband/hw/mlx5/main.c - Commit42cea83f95
(IB/mlx5: Fix cleanup order on unload) added to for-rc and commitb5ca15ad7e
(IB/mlx5: Add proper representors support) add as part of the devel cycle both needed to modify the init/de-init functions used by mlx5. To support the new representors, the new functions added by the cleanup patch needed to be made non-static, and the init/de-init list added by the representors patch needed to be modified to match the init/de-init list changes made by the cleanup patch. Updates: drivers/infiniband/hw/mlx5/mlx5_ib.h - Update function prototypes added by representors patch to reflect new function names as changed by cleanup patch drivers/infiniband/hw/mlx5/ib_rep.c - Update init/de-init stage list to match new order from cleanup patch ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
@@ -3,7 +3,7 @@
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#
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config NET_VENDOR_8390
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bool "National Semi-conductor 8390 devices"
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bool "National Semiconductor 8390 devices"
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default y
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depends on NET_VENDOR_NATSEMI
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---help---
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|
@@ -36,6 +36,8 @@
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#define AQ_CFG_TX_FRAME_MAX (16U * 1024U)
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#define AQ_CFG_RX_FRAME_MAX (4U * 1024U)
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#define AQ_CFG_TX_CLEAN_BUDGET 256U
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/* LRO */
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#define AQ_CFG_IS_LRO_DEF 1U
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|
@@ -247,6 +247,8 @@ void aq_nic_ndev_init(struct aq_nic_s *self)
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self->ndev->hw_features |= aq_hw_caps->hw_features;
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self->ndev->features = aq_hw_caps->hw_features;
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self->ndev->priv_flags = aq_hw_caps->hw_priv_flags;
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self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
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self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN;
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self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN;
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@@ -937,3 +939,23 @@ err_exit:
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out:
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return err;
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}
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void aq_nic_shutdown(struct aq_nic_s *self)
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{
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int err = 0;
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if (!self->ndev)
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return;
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rtnl_lock();
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netif_device_detach(self->ndev);
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err = aq_nic_stop(self);
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if (err < 0)
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goto err_exit;
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aq_nic_deinit(self);
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err_exit:
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rtnl_unlock();
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}
|
@@ -118,5 +118,6 @@ struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self);
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u32 aq_nic_get_fw_version(struct aq_nic_s *self);
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int aq_nic_change_pm_state(struct aq_nic_s *self, pm_message_t *pm_msg);
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int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self);
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void aq_nic_shutdown(struct aq_nic_s *self);
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#endif /* AQ_NIC_H */
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@@ -323,6 +323,20 @@ static void aq_pci_remove(struct pci_dev *pdev)
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pci_disable_device(pdev);
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}
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static void aq_pci_shutdown(struct pci_dev *pdev)
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{
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struct aq_nic_s *self = pci_get_drvdata(pdev);
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aq_nic_shutdown(self);
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pci_disable_device(pdev);
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if (system_state == SYSTEM_POWER_OFF) {
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pci_wake_from_d3(pdev, false);
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pci_set_power_state(pdev, PCI_D3hot);
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}
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}
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static int aq_pci_suspend(struct pci_dev *pdev, pm_message_t pm_msg)
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{
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struct aq_nic_s *self = pci_get_drvdata(pdev);
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@@ -345,6 +359,7 @@ static struct pci_driver aq_pci_ops = {
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.remove = aq_pci_remove,
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.suspend = aq_pci_suspend,
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.resume = aq_pci_resume,
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.shutdown = aq_pci_shutdown,
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};
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module_pci_driver(aq_pci_ops);
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@@ -136,11 +136,12 @@ void aq_ring_queue_stop(struct aq_ring_s *ring)
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netif_stop_subqueue(ndev, ring->idx);
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}
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void aq_ring_tx_clean(struct aq_ring_s *self)
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bool aq_ring_tx_clean(struct aq_ring_s *self)
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{
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struct device *dev = aq_nic_get_dev(self->aq_nic);
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unsigned int budget = AQ_CFG_TX_CLEAN_BUDGET;
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for (; self->sw_head != self->hw_head;
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for (; self->sw_head != self->hw_head && budget--;
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self->sw_head = aq_ring_next_dx(self, self->sw_head)) {
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struct aq_ring_buff_s *buff = &self->buff_ring[self->sw_head];
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@@ -167,6 +168,8 @@ void aq_ring_tx_clean(struct aq_ring_s *self)
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buff->pa = 0U;
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buff->eop_index = 0xffffU;
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}
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return !!budget;
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}
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#define AQ_SKB_ALIGN SKB_DATA_ALIGN(sizeof(struct skb_shared_info))
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|
@@ -153,7 +153,7 @@ void aq_ring_free(struct aq_ring_s *self);
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void aq_ring_update_queue_state(struct aq_ring_s *ring);
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void aq_ring_queue_wake(struct aq_ring_s *ring);
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void aq_ring_queue_stop(struct aq_ring_s *ring);
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void aq_ring_tx_clean(struct aq_ring_s *self);
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bool aq_ring_tx_clean(struct aq_ring_s *self);
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int aq_ring_rx_clean(struct aq_ring_s *self,
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struct napi_struct *napi,
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int *work_done,
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|
@@ -35,12 +35,12 @@ struct aq_vec_s {
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static int aq_vec_poll(struct napi_struct *napi, int budget)
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{
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struct aq_vec_s *self = container_of(napi, struct aq_vec_s, napi);
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unsigned int sw_tail_old = 0U;
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struct aq_ring_s *ring = NULL;
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bool was_tx_cleaned = true;
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unsigned int i = 0U;
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int work_done = 0;
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int err = 0;
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unsigned int i = 0U;
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unsigned int sw_tail_old = 0U;
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bool was_tx_cleaned = false;
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if (!self) {
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err = -EINVAL;
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@@ -57,9 +57,8 @@ static int aq_vec_poll(struct napi_struct *napi, int budget)
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if (ring[AQ_VEC_TX_ID].sw_head !=
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ring[AQ_VEC_TX_ID].hw_head) {
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aq_ring_tx_clean(&ring[AQ_VEC_TX_ID]);
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was_tx_cleaned = aq_ring_tx_clean(&ring[AQ_VEC_TX_ID]);
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aq_ring_update_queue_state(&ring[AQ_VEC_TX_ID]);
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was_tx_cleaned = true;
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}
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err = self->aq_hw_ops->hw_ring_rx_receive(self->aq_hw,
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@@ -90,7 +89,7 @@ static int aq_vec_poll(struct napi_struct *napi, int budget)
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}
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}
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if (was_tx_cleaned)
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if (!was_tx_cleaned)
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work_done = budget;
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if (work_done < budget) {
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|
@@ -21,6 +21,10 @@
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#define HW_ATL_UCP_0X370_REG 0x0370U
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#define HW_ATL_MIF_CMD 0x0200U
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#define HW_ATL_MIF_ADDR 0x0208U
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#define HW_ATL_MIF_VAL 0x020CU
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#define HW_ATL_FW_SM_RAM 0x2U
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#define HW_ATL_MPI_FW_VERSION 0x18
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#define HW_ATL_MPI_CONTROL_ADR 0x0368U
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@@ -79,16 +83,15 @@ int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops)
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static int hw_atl_utils_soft_reset_flb(struct aq_hw_s *self)
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{
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u32 gsr, val;
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int k = 0;
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u32 gsr;
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aq_hw_write_reg(self, 0x404, 0x40e1);
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AQ_HW_SLEEP(50);
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/* Cleanup SPI */
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aq_hw_write_reg(self, 0x534, 0xA0);
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aq_hw_write_reg(self, 0x100, 0x9F);
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aq_hw_write_reg(self, 0x100, 0x809F);
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val = aq_hw_read_reg(self, 0x53C);
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aq_hw_write_reg(self, 0x53C, val | 0x10);
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gsr = aq_hw_read_reg(self, HW_ATL_GLB_SOFT_RES_ADR);
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aq_hw_write_reg(self, HW_ATL_GLB_SOFT_RES_ADR, (gsr & 0xBFFF) | 0x8000);
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@@ -97,7 +100,14 @@ static int hw_atl_utils_soft_reset_flb(struct aq_hw_s *self)
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aq_hw_write_reg(self, 0x404, 0x80e0);
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aq_hw_write_reg(self, 0x32a8, 0x0);
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aq_hw_write_reg(self, 0x520, 0x1);
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/* Reset SPI again because of possible interrupted SPI burst */
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val = aq_hw_read_reg(self, 0x53C);
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aq_hw_write_reg(self, 0x53C, val | 0x10);
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AQ_HW_SLEEP(10);
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/* Clear SPI reset state */
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aq_hw_write_reg(self, 0x53C, val & ~0x10);
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aq_hw_write_reg(self, 0x404, 0x180e0);
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for (k = 0; k < 1000; k++) {
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@@ -141,13 +151,15 @@ static int hw_atl_utils_soft_reset_flb(struct aq_hw_s *self)
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aq_pr_err("FW kickstart failed\n");
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return -EIO;
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}
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/* Old FW requires fixed delay after init */
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AQ_HW_SLEEP(15);
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return 0;
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}
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static int hw_atl_utils_soft_reset_rbl(struct aq_hw_s *self)
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{
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u32 gsr, rbl_status;
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u32 gsr, val, rbl_status;
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int k;
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aq_hw_write_reg(self, 0x404, 0x40e1);
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@@ -157,6 +169,10 @@ static int hw_atl_utils_soft_reset_rbl(struct aq_hw_s *self)
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/* Alter RBL status */
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aq_hw_write_reg(self, 0x388, 0xDEAD);
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/* Cleanup SPI */
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val = aq_hw_read_reg(self, 0x53C);
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aq_hw_write_reg(self, 0x53C, val | 0x10);
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/* Global software reset*/
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hw_atl_rx_rx_reg_res_dis_set(self, 0U);
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hw_atl_tx_tx_reg_res_dis_set(self, 0U);
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@@ -204,6 +220,8 @@ static int hw_atl_utils_soft_reset_rbl(struct aq_hw_s *self)
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aq_pr_err("FW kickstart failed\n");
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return -EIO;
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}
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/* Old FW requires fixed delay after init */
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AQ_HW_SLEEP(15);
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return 0;
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}
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@@ -255,18 +273,22 @@ int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,
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}
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}
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aq_hw_write_reg(self, 0x00000208U, a);
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aq_hw_write_reg(self, HW_ATL_MIF_ADDR, a);
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for (++cnt; --cnt;) {
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u32 i = 0U;
|
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for (++cnt; --cnt && !err;) {
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aq_hw_write_reg(self, HW_ATL_MIF_CMD, 0x00008000U);
|
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|
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aq_hw_write_reg(self, 0x00000200U, 0x00008000U);
|
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if (IS_CHIP_FEATURE(REVISION_B1))
|
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AQ_HW_WAIT_FOR(a != aq_hw_read_reg(self,
|
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HW_ATL_MIF_ADDR),
|
||||
1, 1000U);
|
||||
else
|
||||
AQ_HW_WAIT_FOR(!(0x100 & aq_hw_read_reg(self,
|
||||
HW_ATL_MIF_CMD)),
|
||||
1, 1000U);
|
||||
|
||||
for (i = 1024U;
|
||||
(0x100U & aq_hw_read_reg(self, 0x00000200U)) && --i;) {
|
||||
}
|
||||
|
||||
*(p++) = aq_hw_read_reg(self, 0x0000020CU);
|
||||
*(p++) = aq_hw_read_reg(self, HW_ATL_MIF_VAL);
|
||||
a += 4;
|
||||
}
|
||||
|
||||
hw_atl_reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM);
|
||||
@@ -662,14 +684,18 @@ void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p)
|
||||
u32 val = hw_atl_reg_glb_mif_id_get(self);
|
||||
u32 mif_rev = val & 0xFFU;
|
||||
|
||||
if ((3U & mif_rev) == 1U) {
|
||||
chip_features |=
|
||||
HAL_ATLANTIC_UTILS_CHIP_REVISION_A0 |
|
||||
if ((0xFU & mif_rev) == 1U) {
|
||||
chip_features |= HAL_ATLANTIC_UTILS_CHIP_REVISION_A0 |
|
||||
HAL_ATLANTIC_UTILS_CHIP_MPI_AQ |
|
||||
HAL_ATLANTIC_UTILS_CHIP_MIPS;
|
||||
} else if ((3U & mif_rev) == 2U) {
|
||||
chip_features |=
|
||||
HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 |
|
||||
} else if ((0xFU & mif_rev) == 2U) {
|
||||
chip_features |= HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 |
|
||||
HAL_ATLANTIC_UTILS_CHIP_MPI_AQ |
|
||||
HAL_ATLANTIC_UTILS_CHIP_MIPS |
|
||||
HAL_ATLANTIC_UTILS_CHIP_TPO2 |
|
||||
HAL_ATLANTIC_UTILS_CHIP_RPF2;
|
||||
} else if ((0xFU & mif_rev) == 0xAU) {
|
||||
chip_features |= HAL_ATLANTIC_UTILS_CHIP_REVISION_B1 |
|
||||
HAL_ATLANTIC_UTILS_CHIP_MPI_AQ |
|
||||
HAL_ATLANTIC_UTILS_CHIP_MIPS |
|
||||
HAL_ATLANTIC_UTILS_CHIP_TPO2 |
|
||||
|
@@ -161,6 +161,7 @@ struct __packed hw_aq_atl_utils_mbox {
|
||||
#define HAL_ATLANTIC_UTILS_CHIP_MPI_AQ 0x00000010U
|
||||
#define HAL_ATLANTIC_UTILS_CHIP_REVISION_A0 0x01000000U
|
||||
#define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 0x02000000U
|
||||
#define HAL_ATLANTIC_UTILS_CHIP_REVISION_B1 0x04000000U
|
||||
|
||||
#define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \
|
||||
self->chip_features)
|
||||
|
@@ -13,7 +13,7 @@
|
||||
#define NIC_MAJOR_DRIVER_VERSION 2
|
||||
#define NIC_MINOR_DRIVER_VERSION 0
|
||||
#define NIC_BUILD_DRIVER_VERSION 2
|
||||
#define NIC_REVISION_DRIVER_VERSION 0
|
||||
#define NIC_REVISION_DRIVER_VERSION 1
|
||||
|
||||
#define AQ_CFG_DRV_VERSION_SUFFIX "-kern"
|
||||
|
||||
|
@@ -169,8 +169,10 @@ static int emac_rockchip_probe(struct platform_device *pdev)
|
||||
/* Optional regulator for PHY */
|
||||
priv->regulator = devm_regulator_get_optional(dev, "phy");
|
||||
if (IS_ERR(priv->regulator)) {
|
||||
if (PTR_ERR(priv->regulator) == -EPROBE_DEFER)
|
||||
return -EPROBE_DEFER;
|
||||
if (PTR_ERR(priv->regulator) == -EPROBE_DEFER) {
|
||||
err = -EPROBE_DEFER;
|
||||
goto out_clk_disable;
|
||||
}
|
||||
dev_err(dev, "no regulator found\n");
|
||||
priv->regulator = NULL;
|
||||
}
|
||||
|
@@ -855,10 +855,12 @@ static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring,
|
||||
static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
|
||||
struct bcm_sysport_tx_ring *ring)
|
||||
{
|
||||
unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
|
||||
unsigned int pkts_compl = 0, bytes_compl = 0;
|
||||
struct net_device *ndev = priv->netdev;
|
||||
unsigned int txbds_processed = 0;
|
||||
struct bcm_sysport_cb *cb;
|
||||
unsigned int txbds_ready;
|
||||
unsigned int c_index;
|
||||
u32 hw_ind;
|
||||
|
||||
/* Clear status before servicing to reduce spurious interrupts */
|
||||
@@ -871,29 +873,23 @@ static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
|
||||
/* Compute how many descriptors have been processed since last call */
|
||||
hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
|
||||
c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
|
||||
ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
|
||||
|
||||
last_c_index = ring->c_index;
|
||||
num_tx_cbs = ring->size;
|
||||
|
||||
c_index &= (num_tx_cbs - 1);
|
||||
|
||||
if (c_index >= last_c_index)
|
||||
last_tx_cn = c_index - last_c_index;
|
||||
else
|
||||
last_tx_cn = num_tx_cbs - last_c_index + c_index;
|
||||
txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
|
||||
|
||||
netif_dbg(priv, tx_done, ndev,
|
||||
"ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
|
||||
ring->index, c_index, last_tx_cn, last_c_index);
|
||||
"ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
|
||||
ring->index, ring->c_index, c_index, txbds_ready);
|
||||
|
||||
while (last_tx_cn-- > 0) {
|
||||
cb = ring->cbs + last_c_index;
|
||||
while (txbds_processed < txbds_ready) {
|
||||
cb = &ring->cbs[ring->clean_index];
|
||||
bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl);
|
||||
|
||||
ring->desc_count++;
|
||||
last_c_index++;
|
||||
last_c_index &= (num_tx_cbs - 1);
|
||||
txbds_processed++;
|
||||
|
||||
if (likely(ring->clean_index < ring->size - 1))
|
||||
ring->clean_index++;
|
||||
else
|
||||
ring->clean_index = 0;
|
||||
}
|
||||
|
||||
u64_stats_update_begin(&priv->syncp);
|
||||
@@ -1394,6 +1390,7 @@ static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
|
||||
netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
|
||||
ring->index = index;
|
||||
ring->size = size;
|
||||
ring->clean_index = 0;
|
||||
ring->alloc_size = ring->size;
|
||||
ring->desc_cpu = p;
|
||||
ring->desc_count = ring->size;
|
||||
|
@@ -706,7 +706,7 @@ struct bcm_sysport_tx_ring {
|
||||
unsigned int desc_count; /* Number of descriptors */
|
||||
unsigned int curr_desc; /* Current descriptor */
|
||||
unsigned int c_index; /* Last consumer index */
|
||||
unsigned int p_index; /* Current producer index */
|
||||
unsigned int clean_index; /* Current clean index */
|
||||
struct bcm_sysport_cb *cbs; /* Transmit control blocks */
|
||||
struct dma_desc *desc_cpu; /* CPU view of the descriptor */
|
||||
struct bcm_sysport_priv *priv; /* private context backpointer */
|
||||
|
@@ -13913,7 +13913,7 @@ static void bnx2x_register_phc(struct bnx2x *bp)
|
||||
bp->ptp_clock = ptp_clock_register(&bp->ptp_clock_info, &bp->pdev->dev);
|
||||
if (IS_ERR(bp->ptp_clock)) {
|
||||
bp->ptp_clock = NULL;
|
||||
BNX2X_ERR("PTP clock registeration failed\n");
|
||||
BNX2X_ERR("PTP clock registration failed\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
@@ -1439,7 +1439,7 @@ static inline struct sk_buff *bnxt_tpa_end(struct bnxt *bp,
|
||||
(skb->dev->features & NETIF_F_HW_VLAN_CTAG_RX)) {
|
||||
u16 vlan_proto = tpa_info->metadata >>
|
||||
RX_CMP_FLAGS2_METADATA_TPID_SFT;
|
||||
u16 vtag = tpa_info->metadata & RX_CMP_FLAGS2_METADATA_VID_MASK;
|
||||
u16 vtag = tpa_info->metadata & RX_CMP_FLAGS2_METADATA_TCI_MASK;
|
||||
|
||||
__vlan_hwaccel_put_tag(skb, htons(vlan_proto), vtag);
|
||||
}
|
||||
@@ -1623,7 +1623,7 @@ static int bnxt_rx_pkt(struct bnxt *bp, struct bnxt_napi *bnapi, u32 *raw_cons,
|
||||
cpu_to_le32(RX_CMP_FLAGS2_META_FORMAT_VLAN)) &&
|
||||
(skb->dev->features & NETIF_F_HW_VLAN_CTAG_RX)) {
|
||||
u32 meta_data = le32_to_cpu(rxcmp1->rx_cmp_meta_data);
|
||||
u16 vtag = meta_data & RX_CMP_FLAGS2_METADATA_VID_MASK;
|
||||
u16 vtag = meta_data & RX_CMP_FLAGS2_METADATA_TCI_MASK;
|
||||
u16 vlan_proto = meta_data >> RX_CMP_FLAGS2_METADATA_TPID_SFT;
|
||||
|
||||
__vlan_hwaccel_put_tag(skb, htons(vlan_proto), vtag);
|
||||
@@ -3847,6 +3847,9 @@ static int bnxt_hwrm_vnic_set_tpa(struct bnxt *bp, u16 vnic_id, u32 tpa_flags)
|
||||
struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id];
|
||||
struct hwrm_vnic_tpa_cfg_input req = {0};
|
||||
|
||||
if (vnic->fw_vnic_id == INVALID_HW_RING_ID)
|
||||
return 0;
|
||||
|
||||
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_VNIC_TPA_CFG, -1, -1);
|
||||
|
||||
if (tpa_flags) {
|
||||
@@ -4558,18 +4561,17 @@ int __bnxt_hwrm_get_tx_rings(struct bnxt *bp, u16 fid, int *tx_rings)
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int
|
||||
bnxt_hwrm_reserve_pf_rings(struct bnxt *bp, int tx_rings, int rx_rings,
|
||||
int ring_grps, int cp_rings, int vnics)
|
||||
static void
|
||||
__bnxt_hwrm_reserve_pf_rings(struct bnxt *bp, struct hwrm_func_cfg_input *req,
|
||||
int tx_rings, int rx_rings, int ring_grps,
|
||||
int cp_rings, int vnics)
|
||||
{
|
||||
struct hwrm_func_cfg_input req = {0};
|
||||
u32 enables = 0;
|
||||
int rc;
|
||||
|
||||
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
|
||||
req.fid = cpu_to_le16(0xffff);
|
||||
bnxt_hwrm_cmd_hdr_init(bp, req, HWRM_FUNC_CFG, -1, -1);
|
||||
req->fid = cpu_to_le16(0xffff);
|
||||
enables |= tx_rings ? FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS : 0;
|
||||
req.num_tx_rings = cpu_to_le16(tx_rings);
|
||||
req->num_tx_rings = cpu_to_le16(tx_rings);
|
||||
if (bp->flags & BNXT_FLAG_NEW_RM) {
|
||||
enables |= rx_rings ? FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS : 0;
|
||||
enables |= cp_rings ? FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS |
|
||||
@@ -4578,16 +4580,53 @@ bnxt_hwrm_reserve_pf_rings(struct bnxt *bp, int tx_rings, int rx_rings,
|
||||
FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS : 0;
|
||||
enables |= vnics ? FUNC_VF_CFG_REQ_ENABLES_NUM_VNICS : 0;
|
||||
|
||||
req.num_rx_rings = cpu_to_le16(rx_rings);
|
||||
req.num_hw_ring_grps = cpu_to_le16(ring_grps);
|
||||
req.num_cmpl_rings = cpu_to_le16(cp_rings);
|
||||
req.num_stat_ctxs = req.num_cmpl_rings;
|
||||
req.num_vnics = cpu_to_le16(vnics);
|
||||
req->num_rx_rings = cpu_to_le16(rx_rings);
|
||||
req->num_hw_ring_grps = cpu_to_le16(ring_grps);
|
||||
req->num_cmpl_rings = cpu_to_le16(cp_rings);
|
||||
req->num_stat_ctxs = req->num_cmpl_rings;
|
||||
req->num_vnics = cpu_to_le16(vnics);
|
||||
}
|
||||
if (!enables)
|
||||
req->enables = cpu_to_le32(enables);
|
||||
}
|
||||
|
||||
static void
|
||||
__bnxt_hwrm_reserve_vf_rings(struct bnxt *bp,
|
||||
struct hwrm_func_vf_cfg_input *req, int tx_rings,
|
||||
int rx_rings, int ring_grps, int cp_rings,
|
||||
int vnics)
|
||||
{
|
||||
u32 enables = 0;
|
||||
|
||||
bnxt_hwrm_cmd_hdr_init(bp, req, HWRM_FUNC_VF_CFG, -1, -1);
|
||||
enables |= tx_rings ? FUNC_VF_CFG_REQ_ENABLES_NUM_TX_RINGS : 0;
|
||||
enables |= rx_rings ? FUNC_VF_CFG_REQ_ENABLES_NUM_RX_RINGS : 0;
|
||||
enables |= cp_rings ? FUNC_VF_CFG_REQ_ENABLES_NUM_CMPL_RINGS |
|
||||
FUNC_VF_CFG_REQ_ENABLES_NUM_STAT_CTXS : 0;
|
||||
enables |= ring_grps ? FUNC_VF_CFG_REQ_ENABLES_NUM_HW_RING_GRPS : 0;
|
||||
enables |= vnics ? FUNC_VF_CFG_REQ_ENABLES_NUM_VNICS : 0;
|
||||
|
||||
req->num_tx_rings = cpu_to_le16(tx_rings);
|
||||
req->num_rx_rings = cpu_to_le16(rx_rings);
|
||||
req->num_hw_ring_grps = cpu_to_le16(ring_grps);
|
||||
req->num_cmpl_rings = cpu_to_le16(cp_rings);
|
||||
req->num_stat_ctxs = req->num_cmpl_rings;
|
||||
req->num_vnics = cpu_to_le16(vnics);
|
||||
|
||||
req->enables = cpu_to_le32(enables);
|
||||
}
|
||||
|
||||
static int
|
||||
bnxt_hwrm_reserve_pf_rings(struct bnxt *bp, int tx_rings, int rx_rings,
|
||||
int ring_grps, int cp_rings, int vnics)
|
||||
{
|
||||
struct hwrm_func_cfg_input req = {0};
|
||||
int rc;
|
||||
|
||||
__bnxt_hwrm_reserve_pf_rings(bp, &req, tx_rings, rx_rings, ring_grps,
|
||||
cp_rings, vnics);
|
||||
if (!req.enables)
|
||||
return 0;
|
||||
|
||||
req.enables = cpu_to_le32(enables);
|
||||
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
|
||||
if (rc)
|
||||
return -ENOMEM;
|
||||
@@ -4604,7 +4643,6 @@ bnxt_hwrm_reserve_vf_rings(struct bnxt *bp, int tx_rings, int rx_rings,
|
||||
int ring_grps, int cp_rings, int vnics)
|
||||
{
|
||||
struct hwrm_func_vf_cfg_input req = {0};
|
||||
u32 enables = 0;
|
||||
int rc;
|
||||
|
||||
if (!(bp->flags & BNXT_FLAG_NEW_RM)) {
|
||||
@@ -4612,22 +4650,8 @@ bnxt_hwrm_reserve_vf_rings(struct bnxt *bp, int tx_rings, int rx_rings,
|
||||
return 0;
|
||||
}
|
||||
|
||||
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_VF_CFG, -1, -1);
|
||||
enables |= tx_rings ? FUNC_VF_CFG_REQ_ENABLES_NUM_TX_RINGS : 0;
|
||||
enables |= rx_rings ? FUNC_VF_CFG_REQ_ENABLES_NUM_RX_RINGS : 0;
|
||||
enables |= cp_rings ? FUNC_VF_CFG_REQ_ENABLES_NUM_CMPL_RINGS |
|
||||
FUNC_VF_CFG_REQ_ENABLES_NUM_STAT_CTXS : 0;
|
||||
enables |= ring_grps ? FUNC_VF_CFG_REQ_ENABLES_NUM_HW_RING_GRPS : 0;
|
||||
enables |= vnics ? FUNC_VF_CFG_REQ_ENABLES_NUM_VNICS : 0;
|
||||
|
||||
req.num_tx_rings = cpu_to_le16(tx_rings);
|
||||
req.num_rx_rings = cpu_to_le16(rx_rings);
|
||||
req.num_hw_ring_grps = cpu_to_le16(ring_grps);
|
||||
req.num_cmpl_rings = cpu_to_le16(cp_rings);
|
||||
req.num_stat_ctxs = req.num_cmpl_rings;
|
||||
req.num_vnics = cpu_to_le16(vnics);
|
||||
|
||||
req.enables = cpu_to_le32(enables);
|
||||
__bnxt_hwrm_reserve_vf_rings(bp, &req, tx_rings, rx_rings, ring_grps,
|
||||
cp_rings, vnics);
|
||||
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
|
||||
if (rc)
|
||||
return -ENOMEM;
|
||||
@@ -4743,39 +4767,25 @@ static bool bnxt_need_reserve_rings(struct bnxt *bp)
|
||||
}
|
||||
|
||||
static int bnxt_hwrm_check_vf_rings(struct bnxt *bp, int tx_rings, int rx_rings,
|
||||
int ring_grps, int cp_rings)
|
||||
int ring_grps, int cp_rings, int vnics)
|
||||
{
|
||||
struct hwrm_func_vf_cfg_input req = {0};
|
||||
u32 flags, enables;
|
||||
u32 flags;
|
||||
int rc;
|
||||
|
||||
if (!(bp->flags & BNXT_FLAG_NEW_RM))
|
||||
return 0;
|
||||
|
||||
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_VF_CFG, -1, -1);
|
||||
__bnxt_hwrm_reserve_vf_rings(bp, &req, tx_rings, rx_rings, ring_grps,
|
||||
cp_rings, vnics);
|
||||
flags = FUNC_VF_CFG_REQ_FLAGS_TX_ASSETS_TEST |
|
||||
FUNC_VF_CFG_REQ_FLAGS_RX_ASSETS_TEST |
|
||||
FUNC_VF_CFG_REQ_FLAGS_CMPL_ASSETS_TEST |
|
||||
FUNC_VF_CFG_REQ_FLAGS_RING_GRP_ASSETS_TEST |
|
||||
FUNC_VF_CFG_REQ_FLAGS_STAT_CTX_ASSETS_TEST |
|
||||
FUNC_VF_CFG_REQ_FLAGS_VNIC_ASSETS_TEST;
|
||||
enables = FUNC_VF_CFG_REQ_ENABLES_NUM_TX_RINGS |
|
||||
FUNC_VF_CFG_REQ_ENABLES_NUM_RX_RINGS |
|
||||
FUNC_VF_CFG_REQ_ENABLES_NUM_CMPL_RINGS |
|
||||
FUNC_VF_CFG_REQ_ENABLES_NUM_HW_RING_GRPS |
|
||||
FUNC_VF_CFG_REQ_ENABLES_NUM_STAT_CTXS |
|
||||
FUNC_VF_CFG_REQ_ENABLES_NUM_VNICS;
|
||||
|
||||
req.flags = cpu_to_le32(flags);
|
||||
req.enables = cpu_to_le32(enables);
|
||||
req.num_tx_rings = cpu_to_le16(tx_rings);
|
||||
req.num_rx_rings = cpu_to_le16(rx_rings);
|
||||
req.num_cmpl_rings = cpu_to_le16(cp_rings);
|
||||
req.num_hw_ring_grps = cpu_to_le16(ring_grps);
|
||||
req.num_stat_ctxs = cpu_to_le16(cp_rings);
|
||||
req.num_vnics = cpu_to_le16(1);
|
||||
if (bp->flags & BNXT_FLAG_RFS)
|
||||
req.num_vnics = cpu_to_le16(rx_rings + 1);
|
||||
rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
|
||||
if (rc)
|
||||
return -ENOMEM;
|
||||
@@ -4783,38 +4793,23 @@ static int bnxt_hwrm_check_vf_rings(struct bnxt *bp, int tx_rings, int rx_rings,
|
||||
}
|
||||
|
||||
static int bnxt_hwrm_check_pf_rings(struct bnxt *bp, int tx_rings, int rx_rings,
|
||||
int ring_grps, int cp_rings)
|
||||
int ring_grps, int cp_rings, int vnics)
|
||||
{
|
||||
struct hwrm_func_cfg_input req = {0};
|
||||
u32 flags, enables;
|
||||
u32 flags;
|
||||
int rc;
|
||||
|
||||
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
|
||||
req.fid = cpu_to_le16(0xffff);
|
||||
__bnxt_hwrm_reserve_pf_rings(bp, &req, tx_rings, rx_rings, ring_grps,
|
||||
cp_rings, vnics);
|
||||
flags = FUNC_CFG_REQ_FLAGS_TX_ASSETS_TEST;
|
||||
enables = FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS;
|
||||
req.num_tx_rings = cpu_to_le16(tx_rings);
|
||||
if (bp->flags & BNXT_FLAG_NEW_RM) {
|
||||
if (bp->flags & BNXT_FLAG_NEW_RM)
|
||||
flags |= FUNC_CFG_REQ_FLAGS_RX_ASSETS_TEST |
|
||||
FUNC_CFG_REQ_FLAGS_CMPL_ASSETS_TEST |
|
||||
FUNC_CFG_REQ_FLAGS_RING_GRP_ASSETS_TEST |
|
||||
FUNC_CFG_REQ_FLAGS_STAT_CTX_ASSETS_TEST |
|
||||
FUNC_CFG_REQ_FLAGS_VNIC_ASSETS_TEST;
|
||||
enables |= FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS |
|
||||
FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS |
|
||||
FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS |
|
||||
FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS |
|
||||
FUNC_CFG_REQ_ENABLES_NUM_VNICS;
|
||||
req.num_rx_rings = cpu_to_le16(rx_rings);
|
||||
req.num_cmpl_rings = cpu_to_le16(cp_rings);
|
||||
req.num_hw_ring_grps = cpu_to_le16(ring_grps);
|
||||
req.num_stat_ctxs = cpu_to_le16(cp_rings);
|
||||
req.num_vnics = cpu_to_le16(1);
|
||||
if (bp->flags & BNXT_FLAG_RFS)
|
||||
req.num_vnics = cpu_to_le16(rx_rings + 1);
|
||||
}
|
||||
|
||||
req.flags = cpu_to_le32(flags);
|
||||
req.enables = cpu_to_le32(enables);
|
||||
rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
|
||||
if (rc)
|
||||
return -ENOMEM;
|
||||
@@ -4822,17 +4817,17 @@ static int bnxt_hwrm_check_pf_rings(struct bnxt *bp, int tx_rings, int rx_rings,
|
||||
}
|
||||
|
||||
static int bnxt_hwrm_check_rings(struct bnxt *bp, int tx_rings, int rx_rings,
|
||||
int ring_grps, int cp_rings)
|
||||
int ring_grps, int cp_rings, int vnics)
|
||||
{
|
||||
if (bp->hwrm_spec_code < 0x10801)
|
||||
return 0;
|
||||
|
||||
if (BNXT_PF(bp))
|
||||
return bnxt_hwrm_check_pf_rings(bp, tx_rings, rx_rings,
|
||||
ring_grps, cp_rings);
|
||||
ring_grps, cp_rings, vnics);
|
||||
|
||||
return bnxt_hwrm_check_vf_rings(bp, tx_rings, rx_rings, ring_grps,
|
||||
cp_rings);
|
||||
cp_rings, vnics);
|
||||
}
|
||||
|
||||
static void bnxt_hwrm_set_coal_params(struct bnxt_coal *hw_coal,
|
||||
@@ -5865,7 +5860,6 @@ static int bnxt_init_msix(struct bnxt *bp)
|
||||
if (rc)
|
||||
goto msix_setup_exit;
|
||||
|
||||
bp->tx_nr_rings_per_tc = bp->tx_nr_rings;
|
||||
bp->cp_nr_rings = (min == 1) ?
|
||||
max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
|
||||
bp->tx_nr_rings + bp->rx_nr_rings;
|
||||
@@ -5897,7 +5891,6 @@ static int bnxt_init_inta(struct bnxt *bp)
|
||||
bp->rx_nr_rings = 1;
|
||||
bp->tx_nr_rings = 1;
|
||||
bp->cp_nr_rings = 1;
|
||||
bp->tx_nr_rings_per_tc = bp->tx_nr_rings;
|
||||
bp->flags |= BNXT_FLAG_SHARED_RINGS;
|
||||
bp->irq_tbl[0].vector = bp->pdev->irq;
|
||||
return 0;
|
||||
@@ -7531,7 +7524,7 @@ int bnxt_check_rings(struct bnxt *bp, int tx, int rx, bool sh, int tcs,
|
||||
int max_rx, max_tx, tx_sets = 1;
|
||||
int tx_rings_needed;
|
||||
int rx_rings = rx;
|
||||
int cp, rc;
|
||||
int cp, vnics, rc;
|
||||
|
||||
if (tcs)
|
||||
tx_sets = tcs;
|
||||
@@ -7547,10 +7540,15 @@ int bnxt_check_rings(struct bnxt *bp, int tx, int rx, bool sh, int tcs,
|
||||
if (max_tx < tx_rings_needed)
|
||||
return -ENOMEM;
|
||||
|
||||
vnics = 1;
|
||||
if (bp->flags & BNXT_FLAG_RFS)
|
||||
vnics += rx_rings;
|
||||
|
||||
if (bp->flags & BNXT_FLAG_AGG_RINGS)
|
||||
rx_rings <<= 1;
|
||||
cp = sh ? max_t(int, tx_rings_needed, rx) : tx_rings_needed + rx;
|
||||
return bnxt_hwrm_check_rings(bp, tx_rings_needed, rx_rings, rx, cp);
|
||||
return bnxt_hwrm_check_rings(bp, tx_rings_needed, rx_rings, rx, cp,
|
||||
vnics);
|
||||
}
|
||||
|
||||
static void bnxt_unmap_bars(struct bnxt *bp, struct pci_dev *pdev)
|
||||
@@ -8437,13 +8435,20 @@ int bnxt_restore_pf_fw_resources(struct bnxt *bp)
|
||||
return 0;
|
||||
|
||||
bnxt_hwrm_func_qcaps(bp);
|
||||
__bnxt_close_nic(bp, true, false);
|
||||
|
||||
if (netif_running(bp->dev))
|
||||
__bnxt_close_nic(bp, true, false);
|
||||
|
||||
bnxt_clear_int_mode(bp);
|
||||
rc = bnxt_init_int_mode(bp);
|
||||
if (rc)
|
||||
dev_close(bp->dev);
|
||||
else
|
||||
rc = bnxt_open_nic(bp, true, false);
|
||||
|
||||
if (netif_running(bp->dev)) {
|
||||
if (rc)
|
||||
dev_close(bp->dev);
|
||||
else
|
||||
rc = bnxt_open_nic(bp, true, false);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
@@ -8664,6 +8669,11 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
if (rc)
|
||||
goto init_err_pci_clean;
|
||||
|
||||
/* No TC has been set yet and rings may have been trimmed due to
|
||||
* limited MSIX, so we re-initialize the TX rings per TC.
|
||||
*/
|
||||
bp->tx_nr_rings_per_tc = bp->tx_nr_rings;
|
||||
|
||||
bnxt_get_wol_settings(bp);
|
||||
if (bp->flags & BNXT_FLAG_WOL_CAP)
|
||||
device_set_wakeup_enable(&pdev->dev, bp->wol);
|
||||
|
@@ -189,6 +189,7 @@ struct rx_cmp_ext {
|
||||
#define RX_CMP_FLAGS2_T_L4_CS_CALC (0x1 << 3)
|
||||
#define RX_CMP_FLAGS2_META_FORMAT_VLAN (0x1 << 4)
|
||||
__le32 rx_cmp_meta_data;
|
||||
#define RX_CMP_FLAGS2_METADATA_TCI_MASK 0xffff
|
||||
#define RX_CMP_FLAGS2_METADATA_VID_MASK 0xfff
|
||||
#define RX_CMP_FLAGS2_METADATA_TPID_MASK 0xffff0000
|
||||
#define RX_CMP_FLAGS2_METADATA_TPID_SFT 16
|
||||
|
@@ -349,6 +349,9 @@ static int bnxt_hwrm_cfa_flow_free(struct bnxt *bp, __le16 flow_handle)
|
||||
if (rc)
|
||||
netdev_info(bp->dev, "Error: %s: flow_handle=0x%x rc=%d",
|
||||
__func__, flow_handle, rc);
|
||||
|
||||
if (rc)
|
||||
rc = -EIO;
|
||||
return rc;
|
||||
}
|
||||
|
||||
@@ -484,13 +487,15 @@ static int bnxt_hwrm_cfa_flow_alloc(struct bnxt *bp, struct bnxt_tc_flow *flow,
|
||||
req.action_flags = cpu_to_le16(action_flags);
|
||||
|
||||
mutex_lock(&bp->hwrm_cmd_lock);
|
||||
|
||||
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
|
||||
if (!rc)
|
||||
*flow_handle = resp->flow_handle;
|
||||
|
||||
mutex_unlock(&bp->hwrm_cmd_lock);
|
||||
|
||||
if (rc == HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR)
|
||||
rc = -ENOSPC;
|
||||
else if (rc)
|
||||
rc = -EIO;
|
||||
return rc;
|
||||
}
|
||||
|
||||
@@ -561,6 +566,8 @@ static int hwrm_cfa_decap_filter_alloc(struct bnxt *bp,
|
||||
netdev_info(bp->dev, "%s: Error rc=%d", __func__, rc);
|
||||
mutex_unlock(&bp->hwrm_cmd_lock);
|
||||
|
||||
if (rc)
|
||||
rc = -EIO;
|
||||
return rc;
|
||||
}
|
||||
|
||||
@@ -576,6 +583,9 @@ static int hwrm_cfa_decap_filter_free(struct bnxt *bp,
|
||||
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
|
||||
if (rc)
|
||||
netdev_info(bp->dev, "%s: Error rc=%d", __func__, rc);
|
||||
|
||||
if (rc)
|
||||
rc = -EIO;
|
||||
return rc;
|
||||
}
|
||||
|
||||
@@ -624,6 +634,8 @@ static int hwrm_cfa_encap_record_alloc(struct bnxt *bp,
|
||||
netdev_info(bp->dev, "%s: Error rc=%d", __func__, rc);
|
||||
mutex_unlock(&bp->hwrm_cmd_lock);
|
||||
|
||||
if (rc)
|
||||
rc = -EIO;
|
||||
return rc;
|
||||
}
|
||||
|
||||
@@ -639,6 +651,9 @@ static int hwrm_cfa_encap_record_free(struct bnxt *bp,
|
||||
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
|
||||
if (rc)
|
||||
netdev_info(bp->dev, "%s: Error rc=%d", __func__, rc);
|
||||
|
||||
if (rc)
|
||||
rc = -EIO;
|
||||
return rc;
|
||||
}
|
||||
|
||||
@@ -1269,11 +1284,8 @@ static int bnxt_tc_del_flow(struct bnxt *bp,
|
||||
flow_node = rhashtable_lookup_fast(&tc_info->flow_table,
|
||||
&tc_flow_cmd->cookie,
|
||||
tc_info->flow_ht_params);
|
||||
if (!flow_node) {
|
||||
netdev_info(bp->dev, "ERROR: no flow_node for cookie %lx",
|
||||
tc_flow_cmd->cookie);
|
||||
if (!flow_node)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return __bnxt_tc_del_flow(bp, flow_node);
|
||||
}
|
||||
@@ -1290,11 +1302,8 @@ static int bnxt_tc_get_flow_stats(struct bnxt *bp,
|
||||
flow_node = rhashtable_lookup_fast(&tc_info->flow_table,
|
||||
&tc_flow_cmd->cookie,
|
||||
tc_info->flow_ht_params);
|
||||
if (!flow_node) {
|
||||
netdev_info(bp->dev, "Error: no flow_node for cookie %lx",
|
||||
tc_flow_cmd->cookie);
|
||||
if (!flow_node)
|
||||
return -1;
|
||||
}
|
||||
|
||||
flow = &flow_node->flow;
|
||||
curr_stats = &flow->stats;
|
||||
@@ -1344,8 +1353,10 @@ bnxt_hwrm_cfa_flow_stats_get(struct bnxt *bp, int num_flows,
|
||||
} else {
|
||||
netdev_info(bp->dev, "error rc=%d", rc);
|
||||
}
|
||||
|
||||
mutex_unlock(&bp->hwrm_cmd_lock);
|
||||
|
||||
if (rc)
|
||||
rc = -EIO;
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
@@ -820,7 +820,7 @@ static int tg3_ape_event_lock(struct tg3 *tp, u32 timeout_us)
|
||||
|
||||
tg3_ape_unlock(tp, TG3_APE_LOCK_MEM);
|
||||
|
||||
usleep_range(10, 20);
|
||||
udelay(10);
|
||||
timeout_us -= (timeout_us > 10) ? 10 : timeout_us;
|
||||
}
|
||||
|
||||
|
@@ -5234,7 +5234,6 @@ static void cxgb4_mgmt_setup(struct net_device *dev)
|
||||
/* Initialize the device structure. */
|
||||
dev->netdev_ops = &cxgb4_mgmt_netdev_ops;
|
||||
dev->ethtool_ops = &cxgb4_mgmt_ethtool_ops;
|
||||
dev->needs_free_netdev = true;
|
||||
}
|
||||
|
||||
static int cxgb4_iov_configure(struct pci_dev *pdev, int num_vfs)
|
||||
@@ -5445,6 +5444,8 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
adapter->name = pci_name(pdev);
|
||||
adapter->mbox = func;
|
||||
adapter->pf = func;
|
||||
adapter->params.chip = chip;
|
||||
adapter->adap_idx = adap_idx;
|
||||
adapter->msg_enable = DFLT_MSG_ENABLE;
|
||||
adapter->mbox_log = kzalloc(sizeof(*adapter->mbox_log) +
|
||||
(sizeof(struct mbox_cmd) *
|
||||
|
@@ -540,6 +540,7 @@ static int gmac_setup_txqs(struct net_device *netdev)
|
||||
|
||||
if (port->txq_dma_base & ~DMA_Q_BASE_MASK) {
|
||||
dev_warn(geth->dev, "TX queue base it not aligned\n");
|
||||
kfree(skb_tab);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
|
@@ -2021,7 +2021,6 @@ static inline int dpaa_xmit(struct dpaa_priv *priv,
|
||||
}
|
||||
|
||||
if (unlikely(err < 0)) {
|
||||
percpu_stats->tx_errors++;
|
||||
percpu_stats->tx_fifo_errors++;
|
||||
return err;
|
||||
}
|
||||
@@ -2289,7 +2288,6 @@ static enum qman_cb_dqrr_result rx_default_dqrr(struct qman_portal *portal,
|
||||
vaddr = phys_to_virt(addr);
|
||||
prefetch(vaddr + qm_fd_get_offset(fd));
|
||||
|
||||
fd_format = qm_fd_get_format(fd);
|
||||
/* The only FD types that we may receive are contig and S/G */
|
||||
WARN_ON((fd_format != qm_fd_contig) && (fd_format != qm_fd_sg));
|
||||
|
||||
@@ -2322,8 +2320,10 @@ static enum qman_cb_dqrr_result rx_default_dqrr(struct qman_portal *portal,
|
||||
|
||||
skb_len = skb->len;
|
||||
|
||||
if (unlikely(netif_receive_skb(skb) == NET_RX_DROP))
|
||||
if (unlikely(netif_receive_skb(skb) == NET_RX_DROP)) {
|
||||
percpu_stats->rx_dropped++;
|
||||
return qman_cb_dqrr_consume;
|
||||
}
|
||||
|
||||
percpu_stats->rx_packets++;
|
||||
percpu_stats->rx_bytes += skb_len;
|
||||
@@ -2871,7 +2871,7 @@ static int dpaa_remove(struct platform_device *pdev)
|
||||
struct device *dev;
|
||||
int err;
|
||||
|
||||
dev = &pdev->dev;
|
||||
dev = pdev->dev.parent;
|
||||
net_dev = dev_get_drvdata(dev);
|
||||
|
||||
priv = netdev_priv(net_dev);
|
||||
|
@@ -3600,6 +3600,8 @@ fec_drv_remove(struct platform_device *pdev)
|
||||
fec_enet_mii_remove(fep);
|
||||
if (fep->reg_phy)
|
||||
regulator_disable(fep->reg_phy);
|
||||
pm_runtime_put(&pdev->dev);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
if (of_phy_is_fixed_link(np))
|
||||
of_phy_deregister_fixed_link(np);
|
||||
of_node_put(fep->phy_node);
|
||||
|
@@ -1100,7 +1100,7 @@ int dtsec_add_hash_mac_address(struct fman_mac *dtsec, enet_addr_t *eth_addr)
|
||||
set_bucket(dtsec->regs, bucket, true);
|
||||
|
||||
/* Create element to be added to the driver hash table */
|
||||
hash_entry = kmalloc(sizeof(*hash_entry), GFP_KERNEL);
|
||||
hash_entry = kmalloc(sizeof(*hash_entry), GFP_ATOMIC);
|
||||
if (!hash_entry)
|
||||
return -ENOMEM;
|
||||
hash_entry->addr = addr;
|
||||
|
@@ -666,7 +666,7 @@ static void hns_gmac_get_strings(u32 stringset, u8 *data)
|
||||
|
||||
static int hns_gmac_get_sset_count(int stringset)
|
||||
{
|
||||
if (stringset == ETH_SS_STATS || stringset == ETH_SS_PRIV_FLAGS)
|
||||
if (stringset == ETH_SS_STATS)
|
||||
return ARRAY_SIZE(g_gmac_stats_string);
|
||||
|
||||
return 0;
|
||||
|
@@ -422,7 +422,7 @@ void hns_ppe_update_stats(struct hns_ppe_cb *ppe_cb)
|
||||
|
||||
int hns_ppe_get_sset_count(int stringset)
|
||||
{
|
||||
if (stringset == ETH_SS_STATS || stringset == ETH_SS_PRIV_FLAGS)
|
||||
if (stringset == ETH_SS_STATS)
|
||||
return ETH_PPE_STATIC_NUM;
|
||||
return 0;
|
||||
}
|
||||
|
@@ -876,7 +876,7 @@ void hns_rcb_get_stats(struct hnae_queue *queue, u64 *data)
|
||||
*/
|
||||
int hns_rcb_get_ring_sset_count(int stringset)
|
||||
{
|
||||
if (stringset == ETH_SS_STATS || stringset == ETH_SS_PRIV_FLAGS)
|
||||
if (stringset == ETH_SS_STATS)
|
||||
return HNS_RING_STATIC_REG_NUM;
|
||||
|
||||
return 0;
|
||||
|
@@ -993,8 +993,10 @@ int hns_get_sset_count(struct net_device *netdev, int stringset)
|
||||
cnt--;
|
||||
|
||||
return cnt;
|
||||
} else {
|
||||
} else if (stringset == ETH_SS_STATS) {
|
||||
return (HNS_NET_STATS_CNT + ops->get_sset_count(h, stringset));
|
||||
} else {
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
|
@@ -400,6 +400,10 @@
|
||||
#define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */
|
||||
#define E1000_ICR_RXO 0x00000040 /* Receiver Overrun */
|
||||
#define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */
|
||||
#define E1000_ICR_MDAC 0x00000200 /* MDIO Access Complete */
|
||||
#define E1000_ICR_SRPD 0x00010000 /* Small Receive Packet Detected */
|
||||
#define E1000_ICR_ACK 0x00020000 /* Receive ACK Frame Detected */
|
||||
#define E1000_ICR_MNG 0x00040000 /* Manageability Event Detected */
|
||||
#define E1000_ICR_ECCER 0x00400000 /* Uncorrectable ECC Error */
|
||||
/* If this bit asserted, the driver should claim the interrupt */
|
||||
#define E1000_ICR_INT_ASSERTED 0x80000000
|
||||
@@ -407,7 +411,7 @@
|
||||
#define E1000_ICR_RXQ1 0x00200000 /* Rx Queue 1 Interrupt */
|
||||
#define E1000_ICR_TXQ0 0x00400000 /* Tx Queue 0 Interrupt */
|
||||
#define E1000_ICR_TXQ1 0x00800000 /* Tx Queue 1 Interrupt */
|
||||
#define E1000_ICR_OTHER 0x01000000 /* Other Interrupts */
|
||||
#define E1000_ICR_OTHER 0x01000000 /* Other Interrupt */
|
||||
|
||||
/* PBA ECC Register */
|
||||
#define E1000_PBA_ECC_COUNTER_MASK 0xFFF00000 /* ECC counter mask */
|
||||
@@ -431,12 +435,27 @@
|
||||
E1000_IMS_RXSEQ | \
|
||||
E1000_IMS_LSC)
|
||||
|
||||
/* These are all of the events related to the OTHER interrupt.
|
||||
*/
|
||||
#define IMS_OTHER_MASK ( \
|
||||
E1000_IMS_LSC | \
|
||||
E1000_IMS_RXO | \
|
||||
E1000_IMS_MDAC | \
|
||||
E1000_IMS_SRPD | \
|
||||
E1000_IMS_ACK | \
|
||||
E1000_IMS_MNG)
|
||||
|
||||
/* Interrupt Mask Set */
|
||||
#define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */
|
||||
#define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */
|
||||
#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* Rx sequence error */
|
||||
#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* Rx desc min. threshold */
|
||||
#define E1000_IMS_RXO E1000_ICR_RXO /* Receiver Overrun */
|
||||
#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* Rx timer intr */
|
||||
#define E1000_IMS_MDAC E1000_ICR_MDAC /* MDIO Access Complete */
|
||||
#define E1000_IMS_SRPD E1000_ICR_SRPD /* Small Receive Packet */
|
||||
#define E1000_IMS_ACK E1000_ICR_ACK /* Receive ACK Frame Detected */
|
||||
#define E1000_IMS_MNG E1000_ICR_MNG /* Manageability Event */
|
||||
#define E1000_IMS_ECCER E1000_ICR_ECCER /* Uncorrectable ECC Error */
|
||||
#define E1000_IMS_RXQ0 E1000_ICR_RXQ0 /* Rx Queue 0 Interrupt */
|
||||
#define E1000_IMS_RXQ1 E1000_ICR_RXQ1 /* Rx Queue 1 Interrupt */
|
||||
|
@@ -1367,9 +1367,6 @@ out:
|
||||
* Checks to see of the link status of the hardware has changed. If a
|
||||
* change in link status has been detected, then we read the PHY registers
|
||||
* to get the current speed/duplex if link exists.
|
||||
*
|
||||
* Returns a negative error code (-E1000_ERR_*) or 0 (link down) or 1 (link
|
||||
* up).
|
||||
**/
|
||||
static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
{
|
||||
@@ -1385,7 +1382,8 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
* Change or Rx Sequence Error interrupt.
|
||||
*/
|
||||
if (!mac->get_link_status)
|
||||
return 1;
|
||||
return 0;
|
||||
mac->get_link_status = false;
|
||||
|
||||
/* First we want to see if the MII Status Register reports
|
||||
* link. If so, then we want to get the current speed/duplex
|
||||
@@ -1393,12 +1391,12 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
*/
|
||||
ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
goto out;
|
||||
|
||||
if (hw->mac.type == e1000_pchlan) {
|
||||
ret_val = e1000_k1_gig_workaround_hv(hw, link);
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* When connected at 10Mbps half-duplex, some parts are excessively
|
||||
@@ -1431,7 +1429,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
|
||||
ret_val = hw->phy.ops.acquire(hw);
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
goto out;
|
||||
|
||||
if (hw->mac.type == e1000_pch2lan)
|
||||
emi_addr = I82579_RX_CONFIG;
|
||||
@@ -1453,7 +1451,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
hw->phy.ops.release(hw);
|
||||
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
goto out;
|
||||
|
||||
if (hw->mac.type >= e1000_pch_spt) {
|
||||
u16 data;
|
||||
@@ -1462,14 +1460,14 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
if (speed == SPEED_1000) {
|
||||
ret_val = hw->phy.ops.acquire(hw);
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
goto out;
|
||||
|
||||
ret_val = e1e_rphy_locked(hw,
|
||||
PHY_REG(776, 20),
|
||||
&data);
|
||||
if (ret_val) {
|
||||
hw->phy.ops.release(hw);
|
||||
return ret_val;
|
||||
goto out;
|
||||
}
|
||||
|
||||
ptr_gap = (data & (0x3FF << 2)) >> 2;
|
||||
@@ -1483,18 +1481,18 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
}
|
||||
hw->phy.ops.release(hw);
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
goto out;
|
||||
} else {
|
||||
ret_val = hw->phy.ops.acquire(hw);
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
goto out;
|
||||
|
||||
ret_val = e1e_wphy_locked(hw,
|
||||
PHY_REG(776, 20),
|
||||
0xC023);
|
||||
hw->phy.ops.release(hw);
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
goto out;
|
||||
|
||||
}
|
||||
}
|
||||
@@ -1521,7 +1519,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
(hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_V3)) {
|
||||
ret_val = e1000_k1_workaround_lpt_lp(hw, link);
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
goto out;
|
||||
}
|
||||
if (hw->mac.type >= e1000_pch_lpt) {
|
||||
/* Set platform power management values for
|
||||
@@ -1529,7 +1527,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
*/
|
||||
ret_val = e1000_platform_pm_pch_lpt(hw, link);
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Clear link partner's EEE ability */
|
||||
@@ -1552,9 +1550,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
}
|
||||
|
||||
if (!link)
|
||||
return 0; /* No link detected */
|
||||
|
||||
mac->get_link_status = false;
|
||||
goto out;
|
||||
|
||||
switch (hw->mac.type) {
|
||||
case e1000_pch2lan:
|
||||
@@ -1616,12 +1612,14 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
||||
* different link partner.
|
||||
*/
|
||||
ret_val = e1000e_config_fc_after_link_up(hw);
|
||||
if (ret_val) {
|
||||
if (ret_val)
|
||||
e_dbg("Error configuring flow control\n");
|
||||
return ret_val;
|
||||
}
|
||||
|
||||
return 1;
|
||||
return ret_val;
|
||||
|
||||
out:
|
||||
mac->get_link_status = true;
|
||||
return ret_val;
|
||||
}
|
||||
|
||||
static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter)
|
||||
|
@@ -410,9 +410,6 @@ void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw)
|
||||
* Checks to see of the link status of the hardware has changed. If a
|
||||
* change in link status has been detected, then we read the PHY registers
|
||||
* to get the current speed/duplex if link exists.
|
||||
*
|
||||
* Returns a negative error code (-E1000_ERR_*) or 0 (link down) or 1 (link
|
||||
* up).
|
||||
**/
|
||||
s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
|
||||
{
|
||||
@@ -426,20 +423,16 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
|
||||
* Change or Rx Sequence Error interrupt.
|
||||
*/
|
||||
if (!mac->get_link_status)
|
||||
return 1;
|
||||
return 0;
|
||||
mac->get_link_status = false;
|
||||
|
||||
/* First we want to see if the MII Status Register reports
|
||||
* link. If so, then we want to get the current speed/duplex
|
||||
* of the PHY.
|
||||
*/
|
||||
ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
|
||||
if (!link)
|
||||
return 0; /* No link detected */
|
||||
|
||||
mac->get_link_status = false;
|
||||
if (ret_val || !link)
|
||||
goto out;
|
||||
|
||||
/* Check if there was DownShift, must be checked
|
||||
* immediately after link-up
|
||||
@@ -464,12 +457,14 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
|
||||
* different link partner.
|
||||
*/
|
||||
ret_val = e1000e_config_fc_after_link_up(hw);
|
||||
if (ret_val) {
|
||||
if (ret_val)
|
||||
e_dbg("Error configuring flow control\n");
|
||||
return ret_val;
|
||||
}
|
||||
|
||||
return 1;
|
||||
return ret_val;
|
||||
|
||||
out:
|
||||
mac->get_link_status = true;
|
||||
return ret_val;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@@ -1914,30 +1914,20 @@ static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
|
||||
struct net_device *netdev = data;
|
||||
struct e1000_adapter *adapter = netdev_priv(netdev);
|
||||
struct e1000_hw *hw = &adapter->hw;
|
||||
u32 icr;
|
||||
bool enable = true;
|
||||
u32 icr = er32(ICR);
|
||||
|
||||
if (icr & adapter->eiac_mask)
|
||||
ew32(ICS, (icr & adapter->eiac_mask));
|
||||
|
||||
icr = er32(ICR);
|
||||
if (icr & E1000_ICR_RXO) {
|
||||
ew32(ICR, E1000_ICR_RXO);
|
||||
enable = false;
|
||||
/* napi poll will re-enable Other, make sure it runs */
|
||||
if (napi_schedule_prep(&adapter->napi)) {
|
||||
adapter->total_rx_bytes = 0;
|
||||
adapter->total_rx_packets = 0;
|
||||
__napi_schedule(&adapter->napi);
|
||||
}
|
||||
}
|
||||
if (icr & E1000_ICR_LSC) {
|
||||
ew32(ICR, E1000_ICR_LSC);
|
||||
hw->mac.get_link_status = true;
|
||||
/* guard against interrupt when we're going down */
|
||||
if (!test_bit(__E1000_DOWN, &adapter->state))
|
||||
mod_timer(&adapter->watchdog_timer, jiffies + 1);
|
||||
}
|
||||
|
||||
if (enable && !test_bit(__E1000_DOWN, &adapter->state))
|
||||
ew32(IMS, E1000_IMS_OTHER);
|
||||
if (!test_bit(__E1000_DOWN, &adapter->state))
|
||||
ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
@@ -2040,7 +2030,6 @@ static void e1000_configure_msix(struct e1000_adapter *adapter)
|
||||
hw->hw_addr + E1000_EITR_82574(vector));
|
||||
else
|
||||
writel(1, hw->hw_addr + E1000_EITR_82574(vector));
|
||||
adapter->eiac_mask |= E1000_IMS_OTHER;
|
||||
|
||||
/* Cause Tx interrupts on every write back */
|
||||
ivar |= BIT(31);
|
||||
@@ -2265,7 +2254,8 @@ static void e1000_irq_enable(struct e1000_adapter *adapter)
|
||||
|
||||
if (adapter->msix_entries) {
|
||||
ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
|
||||
ew32(IMS, adapter->eiac_mask | E1000_IMS_LSC);
|
||||
ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
|
||||
IMS_OTHER_MASK);
|
||||
} else if (hw->mac.type >= e1000_pch_lpt) {
|
||||
ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
|
||||
} else {
|
||||
@@ -2333,8 +2323,8 @@ static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
|
||||
{
|
||||
struct pci_dev *pdev = adapter->pdev;
|
||||
|
||||
ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
|
||||
GFP_KERNEL);
|
||||
ring->desc = dma_zalloc_coherent(&pdev->dev, ring->size, &ring->dma,
|
||||
GFP_KERNEL);
|
||||
if (!ring->desc)
|
||||
return -ENOMEM;
|
||||
|
||||
@@ -2707,8 +2697,7 @@ static int e1000e_poll(struct napi_struct *napi, int weight)
|
||||
napi_complete_done(napi, work_done);
|
||||
if (!test_bit(__E1000_DOWN, &adapter->state)) {
|
||||
if (adapter->msix_entries)
|
||||
ew32(IMS, adapter->rx_ring->ims_val |
|
||||
E1000_IMS_OTHER);
|
||||
ew32(IMS, adapter->rx_ring->ims_val);
|
||||
else
|
||||
e1000_irq_enable(adapter);
|
||||
}
|
||||
@@ -5101,7 +5090,7 @@ static bool e1000e_has_link(struct e1000_adapter *adapter)
|
||||
case e1000_media_type_copper:
|
||||
if (hw->mac.get_link_status) {
|
||||
ret_val = hw->mac.ops.check_for_link(hw);
|
||||
link_active = ret_val > 0;
|
||||
link_active = !hw->mac.get_link_status;
|
||||
} else {
|
||||
link_active = true;
|
||||
}
|
||||
|
@@ -124,7 +124,7 @@ void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force)
|
||||
trigger_cmd_completions(dev);
|
||||
}
|
||||
|
||||
mlx5_core_event(dev, MLX5_DEV_EVENT_SYS_ERROR, 0);
|
||||
mlx5_core_event(dev, MLX5_DEV_EVENT_SYS_ERROR, 1);
|
||||
mlx5_core_err(dev, "end\n");
|
||||
|
||||
unlock:
|
||||
|
@@ -443,6 +443,17 @@ int mlxsw_afa_block_jump(struct mlxsw_afa_block *block, u16 group_id)
|
||||
}
|
||||
EXPORT_SYMBOL(mlxsw_afa_block_jump);
|
||||
|
||||
int mlxsw_afa_block_terminate(struct mlxsw_afa_block *block)
|
||||
{
|
||||
if (block->finished)
|
||||
return -EINVAL;
|
||||
mlxsw_afa_set_goto_set(block->cur_set,
|
||||
MLXSW_AFA_SET_GOTO_BINDING_CMD_TERM, 0);
|
||||
block->finished = true;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(mlxsw_afa_block_terminate);
|
||||
|
||||
static struct mlxsw_afa_fwd_entry *
|
||||
mlxsw_afa_fwd_entry_create(struct mlxsw_afa *mlxsw_afa, u8 local_port)
|
||||
{
|
||||
|
@@ -67,6 +67,7 @@ char *mlxsw_afa_block_first_set(struct mlxsw_afa_block *block);
|
||||
u32 mlxsw_afa_block_first_set_kvdl_index(struct mlxsw_afa_block *block);
|
||||
int mlxsw_afa_block_continue(struct mlxsw_afa_block *block);
|
||||
int mlxsw_afa_block_jump(struct mlxsw_afa_block *block, u16 group_id);
|
||||
int mlxsw_afa_block_terminate(struct mlxsw_afa_block *block);
|
||||
int mlxsw_afa_block_append_drop(struct mlxsw_afa_block *block);
|
||||
int mlxsw_afa_block_append_trap(struct mlxsw_afa_block *block, u16 trap_id);
|
||||
int mlxsw_afa_block_append_trap_and_forward(struct mlxsw_afa_block *block,
|
||||
|
@@ -535,6 +535,7 @@ void mlxsw_sp_acl_rulei_keymask_buf(struct mlxsw_sp_acl_rule_info *rulei,
|
||||
int mlxsw_sp_acl_rulei_act_continue(struct mlxsw_sp_acl_rule_info *rulei);
|
||||
int mlxsw_sp_acl_rulei_act_jump(struct mlxsw_sp_acl_rule_info *rulei,
|
||||
u16 group_id);
|
||||
int mlxsw_sp_acl_rulei_act_terminate(struct mlxsw_sp_acl_rule_info *rulei);
|
||||
int mlxsw_sp_acl_rulei_act_drop(struct mlxsw_sp_acl_rule_info *rulei);
|
||||
int mlxsw_sp_acl_rulei_act_trap(struct mlxsw_sp_acl_rule_info *rulei);
|
||||
int mlxsw_sp_acl_rulei_act_mirror(struct mlxsw_sp *mlxsw_sp,
|
||||
|
@@ -518,6 +518,11 @@ int mlxsw_sp_acl_rulei_act_jump(struct mlxsw_sp_acl_rule_info *rulei,
|
||||
return mlxsw_afa_block_jump(rulei->act_block, group_id);
|
||||
}
|
||||
|
||||
int mlxsw_sp_acl_rulei_act_terminate(struct mlxsw_sp_acl_rule_info *rulei)
|
||||
{
|
||||
return mlxsw_afa_block_terminate(rulei->act_block);
|
||||
}
|
||||
|
||||
int mlxsw_sp_acl_rulei_act_drop(struct mlxsw_sp_acl_rule_info *rulei)
|
||||
{
|
||||
return mlxsw_afa_block_append_drop(rulei->act_block);
|
||||
|
@@ -385,13 +385,13 @@ static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms_egress[] = {
|
||||
|
||||
static const struct mlxsw_sp_sb_cm mlxsw_sp_cpu_port_sb_cms[] = {
|
||||
MLXSW_SP_CPU_PORT_SB_CM,
|
||||
MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
|
||||
MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
|
||||
MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
|
||||
MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
|
||||
MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
|
||||
MLXSW_SP_CPU_PORT_SB_CM,
|
||||
MLXSW_SP_CPU_PORT_SB_CM,
|
||||
MLXSW_SP_CPU_PORT_SB_CM,
|
||||
MLXSW_SP_CPU_PORT_SB_CM,
|
||||
MLXSW_SP_CPU_PORT_SB_CM,
|
||||
MLXSW_SP_CPU_PORT_SB_CM,
|
||||
MLXSW_SP_SB_CM(10000, 0, 0),
|
||||
MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
|
||||
MLXSW_SP_CPU_PORT_SB_CM,
|
||||
MLXSW_SP_CPU_PORT_SB_CM,
|
||||
MLXSW_SP_CPU_PORT_SB_CM,
|
||||
|
@@ -65,7 +65,7 @@ static int mlxsw_sp_flower_parse_actions(struct mlxsw_sp *mlxsw_sp,
|
||||
tcf_exts_to_list(exts, &actions);
|
||||
list_for_each_entry(a, &actions, list) {
|
||||
if (is_tcf_gact_ok(a)) {
|
||||
err = mlxsw_sp_acl_rulei_act_continue(rulei);
|
||||
err = mlxsw_sp_acl_rulei_act_terminate(rulei);
|
||||
if (err)
|
||||
return err;
|
||||
} else if (is_tcf_gact_shot(a)) {
|
||||
|
@@ -51,6 +51,9 @@ struct mlxsw_sp_span_inspected_port {
|
||||
struct list_head list;
|
||||
enum mlxsw_sp_span_type type;
|
||||
u8 local_port;
|
||||
|
||||
/* Whether this is a directly bound mirror (port-to-port) or an ACL. */
|
||||
bool bound;
|
||||
};
|
||||
|
||||
struct mlxsw_sp_span_parms {
|
||||
|
@@ -1,16 +1,16 @@
|
||||
#
|
||||
# National Semi-conductor device configuration
|
||||
# National Semiconductor device configuration
|
||||
#
|
||||
|
||||
config NET_VENDOR_NATSEMI
|
||||
bool "National Semi-conductor devices"
|
||||
bool "National Semiconductor devices"
|
||||
default y
|
||||
---help---
|
||||
If you have a network (Ethernet) card belonging to this class, say Y.
|
||||
|
||||
Note that the answer to this question doesn't directly affect the
|
||||
kernel: saying N will just cause the configurator to skip all
|
||||
the questions about National Semi-conductor devices. If you say Y,
|
||||
the questions about National Semiconductor devices. If you say Y,
|
||||
you will be asked for your specific card in the following questions.
|
||||
|
||||
if NET_VENDOR_NATSEMI
|
||||
|
@@ -1,6 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
#
|
||||
# Makefile for the National Semi-conductor Sonic devices.
|
||||
# Makefile for the National Semiconductor Sonic devices.
|
||||
#
|
||||
|
||||
obj-$(CONFIG_MACSONIC) += macsonic.o
|
||||
|
@@ -2480,7 +2480,10 @@ int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto)
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/* Free Task CXT */
|
||||
/* Free Task CXT ( Intentionally RoCE as task-id is shared between
|
||||
* RoCE and iWARP )
|
||||
*/
|
||||
proto = PROTOCOLID_ROCE;
|
||||
rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_TASK, 0,
|
||||
qed_cxt_get_proto_tid_count(p_hwfn, proto));
|
||||
if (rc)
|
||||
|
@@ -1703,6 +1703,13 @@ qed_iwarp_parse_rx_pkt(struct qed_hwfn *p_hwfn,
|
||||
iph = (struct iphdr *)((u8 *)(ethh) + eth_hlen);
|
||||
|
||||
if (eth_type == ETH_P_IP) {
|
||||
if (iph->protocol != IPPROTO_TCP) {
|
||||
DP_NOTICE(p_hwfn,
|
||||
"Unexpected ip protocol on ll2 %x\n",
|
||||
iph->protocol);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
cm_info->local_ip[0] = ntohl(iph->daddr);
|
||||
cm_info->remote_ip[0] = ntohl(iph->saddr);
|
||||
cm_info->ip_version = TCP_IPV4;
|
||||
@@ -1711,6 +1718,14 @@ qed_iwarp_parse_rx_pkt(struct qed_hwfn *p_hwfn,
|
||||
*payload_len = ntohs(iph->tot_len) - ip_hlen;
|
||||
} else if (eth_type == ETH_P_IPV6) {
|
||||
ip6h = (struct ipv6hdr *)iph;
|
||||
|
||||
if (ip6h->nexthdr != IPPROTO_TCP) {
|
||||
DP_NOTICE(p_hwfn,
|
||||
"Unexpected ip protocol on ll2 %x\n",
|
||||
iph->protocol);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
cm_info->local_ip[i] =
|
||||
ntohl(ip6h->daddr.in6_u.u6_addr32[i]);
|
||||
@@ -1928,8 +1943,8 @@ qed_iwarp_update_fpdu_length(struct qed_hwfn *p_hwfn,
|
||||
/* Missing lower byte is now available */
|
||||
mpa_len = fpdu->fpdu_length | *mpa_data;
|
||||
fpdu->fpdu_length = QED_IWARP_FPDU_LEN_WITH_PAD(mpa_len);
|
||||
fpdu->mpa_frag_len = fpdu->fpdu_length;
|
||||
/* one byte of hdr */
|
||||
fpdu->mpa_frag_len = 1;
|
||||
fpdu->incomplete_bytes = fpdu->fpdu_length - 1;
|
||||
DP_VERBOSE(p_hwfn,
|
||||
QED_MSG_RDMA,
|
||||
|
@@ -379,6 +379,7 @@ static void qed_rdma_free(struct qed_hwfn *p_hwfn)
|
||||
DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Freeing RDMA\n");
|
||||
|
||||
qed_rdma_free_reserved_lkey(p_hwfn);
|
||||
qed_cxt_free_proto_ilt(p_hwfn, p_hwfn->p_rdma_info->proto);
|
||||
qed_rdma_resc_free(p_hwfn);
|
||||
}
|
||||
|
||||
|
@@ -288,7 +288,7 @@ int __init qede_init(void)
|
||||
}
|
||||
|
||||
/* Must register notifier before pci ops, since we might miss
|
||||
* interface rename after pci probe and netdev registeration.
|
||||
* interface rename after pci probe and netdev registration.
|
||||
*/
|
||||
ret = register_netdevice_notifier(&qede_netdev_notifier);
|
||||
if (ret) {
|
||||
@@ -988,7 +988,7 @@ static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
|
||||
if (rc)
|
||||
goto err3;
|
||||
|
||||
/* Prepare the lock prior to the registeration of the netdev,
|
||||
/* Prepare the lock prior to the registration of the netdev,
|
||||
* as once it's registered we might reach flows requiring it
|
||||
* [it's even possible to reach a flow needing it directly
|
||||
* from there, although it's unlikely].
|
||||
@@ -2067,8 +2067,6 @@ static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
|
||||
link_params.link_up = true;
|
||||
edev->ops->common->set_link(edev->cdev, &link_params);
|
||||
|
||||
qede_rdma_dev_event_open(edev);
|
||||
|
||||
edev->state = QEDE_STATE_OPEN;
|
||||
|
||||
DP_INFO(edev, "Ending successfully qede load\n");
|
||||
@@ -2169,12 +2167,14 @@ static void qede_link_update(void *dev, struct qed_link_output *link)
|
||||
DP_NOTICE(edev, "Link is up\n");
|
||||
netif_tx_start_all_queues(edev->ndev);
|
||||
netif_carrier_on(edev->ndev);
|
||||
qede_rdma_dev_event_open(edev);
|
||||
}
|
||||
} else {
|
||||
if (netif_carrier_ok(edev->ndev)) {
|
||||
DP_NOTICE(edev, "Link is down\n");
|
||||
netif_tx_disable(edev->ndev);
|
||||
netif_carrier_off(edev->ndev);
|
||||
qede_rdma_dev_event_close(edev);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@@ -485,7 +485,7 @@ int qede_ptp_enable(struct qede_dev *edev, bool init_tc)
|
||||
ptp->clock = ptp_clock_register(&ptp->clock_info, &edev->pdev->dev);
|
||||
if (IS_ERR(ptp->clock)) {
|
||||
rc = -EINVAL;
|
||||
DP_ERR(edev, "PTP clock registeration failed\n");
|
||||
DP_ERR(edev, "PTP clock registration failed\n");
|
||||
goto err2;
|
||||
}
|
||||
|
||||
|
@@ -1194,9 +1194,9 @@ void emac_mac_tx_process(struct emac_adapter *adpt, struct emac_tx_queue *tx_q)
|
||||
while (tx_q->tpd.consume_idx != hw_consume_idx) {
|
||||
tpbuf = GET_TPD_BUFFER(tx_q, tx_q->tpd.consume_idx);
|
||||
if (tpbuf->dma_addr) {
|
||||
dma_unmap_single(adpt->netdev->dev.parent,
|
||||
tpbuf->dma_addr, tpbuf->length,
|
||||
DMA_TO_DEVICE);
|
||||
dma_unmap_page(adpt->netdev->dev.parent,
|
||||
tpbuf->dma_addr, tpbuf->length,
|
||||
DMA_TO_DEVICE);
|
||||
tpbuf->dma_addr = 0;
|
||||
}
|
||||
|
||||
@@ -1353,9 +1353,11 @@ static void emac_tx_fill_tpd(struct emac_adapter *adpt,
|
||||
|
||||
tpbuf = GET_TPD_BUFFER(tx_q, tx_q->tpd.produce_idx);
|
||||
tpbuf->length = mapped_len;
|
||||
tpbuf->dma_addr = dma_map_single(adpt->netdev->dev.parent,
|
||||
skb->data, tpbuf->length,
|
||||
DMA_TO_DEVICE);
|
||||
tpbuf->dma_addr = dma_map_page(adpt->netdev->dev.parent,
|
||||
virt_to_page(skb->data),
|
||||
offset_in_page(skb->data),
|
||||
tpbuf->length,
|
||||
DMA_TO_DEVICE);
|
||||
ret = dma_mapping_error(adpt->netdev->dev.parent,
|
||||
tpbuf->dma_addr);
|
||||
if (ret)
|
||||
@@ -1371,9 +1373,12 @@ static void emac_tx_fill_tpd(struct emac_adapter *adpt,
|
||||
if (mapped_len < len) {
|
||||
tpbuf = GET_TPD_BUFFER(tx_q, tx_q->tpd.produce_idx);
|
||||
tpbuf->length = len - mapped_len;
|
||||
tpbuf->dma_addr = dma_map_single(adpt->netdev->dev.parent,
|
||||
skb->data + mapped_len,
|
||||
tpbuf->length, DMA_TO_DEVICE);
|
||||
tpbuf->dma_addr = dma_map_page(adpt->netdev->dev.parent,
|
||||
virt_to_page(skb->data +
|
||||
mapped_len),
|
||||
offset_in_page(skb->data +
|
||||
mapped_len),
|
||||
tpbuf->length, DMA_TO_DEVICE);
|
||||
ret = dma_mapping_error(adpt->netdev->dev.parent,
|
||||
tpbuf->dma_addr);
|
||||
if (ret)
|
||||
|
@@ -2335,14 +2335,14 @@ static int smsc911x_drv_remove(struct platform_device *pdev)
|
||||
pdata = netdev_priv(dev);
|
||||
BUG_ON(!pdata);
|
||||
BUG_ON(!pdata->ioaddr);
|
||||
WARN_ON(dev->phydev);
|
||||
|
||||
SMSC_TRACE(pdata, ifdown, "Stopping driver");
|
||||
|
||||
unregister_netdev(dev);
|
||||
|
||||
mdiobus_unregister(pdata->mii_bus);
|
||||
mdiobus_free(pdata->mii_bus);
|
||||
|
||||
unregister_netdev(dev);
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
||||
"smsc911x-memory");
|
||||
if (!res)
|
||||
|
@@ -1295,7 +1295,7 @@ static int ave_open(struct net_device *ndev)
|
||||
val |= AVE_IIRQC_EN0 | (AVE_INTM_COUNT << 16);
|
||||
writel(val, priv->base + AVE_IIRQC);
|
||||
|
||||
val = AVE_GI_RXIINT | AVE_GI_RXOVF | AVE_GI_TX;
|
||||
val = AVE_GI_RXIINT | AVE_GI_RXOVF | AVE_GI_TX | AVE_GI_RXDROP;
|
||||
ave_irq_restore(ndev, val);
|
||||
|
||||
napi_enable(&priv->napi_rx);
|
||||
|
@@ -312,7 +312,7 @@ static struct vnet *vnet_new(const u64 *local_mac,
|
||||
dev->ethtool_ops = &vnet_ethtool_ops;
|
||||
dev->watchdog_timeo = VNET_TX_TIMEOUT;
|
||||
|
||||
dev->hw_features = NETIF_F_TSO | NETIF_F_GSO | NETIF_F_GSO_SOFTWARE |
|
||||
dev->hw_features = NETIF_F_TSO | NETIF_F_GSO | NETIF_F_ALL_TSO |
|
||||
NETIF_F_HW_CSUM | NETIF_F_SG;
|
||||
dev->features = dev->hw_features;
|
||||
|
||||
|
@@ -1075,7 +1075,8 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave,
|
||||
/* set speed_in input in case RMII mode is used in 100Mbps */
|
||||
if (phy->speed == 100)
|
||||
mac_control |= BIT(15);
|
||||
else if (phy->speed == 10)
|
||||
/* in band mode only works in 10Mbps RGMII mode */
|
||||
else if ((phy->speed == 10) && phy_interface_is_rgmii(phy))
|
||||
mac_control |= BIT(18); /* In Band mode */
|
||||
|
||||
if (priv->rx_pause)
|
||||
|
Reference in New Issue
Block a user