can: add driver for Softing card
This patch adds a driver for the platform:softing device. This will create (up to) 2 CAN network devices from 1 platform:softing device Signed-off-by: Kurt Van Dijck <kurt.van.dijck@eia.be> Acked-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Kurt Van Dijck
committed by
David S. Miller
David S. Miller
parent
2221eca0a2
commit
03fd3cf5a1
167
drivers/net/can/softing/softing.h
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167
drivers/net/can/softing/softing.h
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/*
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* softing common interfaces
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*
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* by Kurt Van Dijck, 2008-2010
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*/
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#include <linux/atomic.h>
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#include <linux/netdevice.h>
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#include <linux/ktime.h>
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#include <linux/mutex.h>
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#include <linux/spinlock.h>
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#include <linux/can.h>
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#include <linux/can/dev.h>
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#include "softing_platform.h"
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struct softing;
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struct softing_priv {
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struct can_priv can; /* must be the first member! */
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struct net_device *netdev;
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struct softing *card;
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struct {
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int pending;
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/* variables wich hold the circular buffer */
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int echo_put;
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int echo_get;
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} tx;
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struct can_bittiming_const btr_const;
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int index;
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uint8_t output;
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uint16_t chip;
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};
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#define netdev2softing(netdev) ((struct softing_priv *)netdev_priv(netdev))
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struct softing {
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const struct softing_platform_data *pdat;
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struct platform_device *pdev;
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struct net_device *net[2];
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spinlock_t spin; /* protect this structure & DPRAM access */
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ktime_t ts_ref;
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ktime_t ts_overflow; /* timestamp overflow value, in ktime */
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struct {
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/* indication of firmware status */
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int up;
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/* protection of the 'up' variable */
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struct mutex lock;
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} fw;
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struct {
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int nr;
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int requested;
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int svc_count;
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unsigned int dpram_position;
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} irq;
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struct {
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int pending;
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int last_bus;
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/*
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* keep the bus that last tx'd a message,
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* in order to let every netdev queue resume
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*/
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} tx;
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__iomem uint8_t *dpram;
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unsigned long dpram_phys;
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unsigned long dpram_size;
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struct {
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uint16_t fw_version, hw_version, license, serial;
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uint16_t chip[2];
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unsigned int freq; /* remote cpu's operating frequency */
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} id;
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};
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extern int softing_default_output(struct net_device *netdev);
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extern ktime_t softing_raw2ktime(struct softing *card, u32 raw);
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extern int softing_chip_poweron(struct softing *card);
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extern int softing_bootloader_command(struct softing *card, int16_t cmd,
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const char *msg);
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/* Load firmware after reset */
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extern int softing_load_fw(const char *file, struct softing *card,
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__iomem uint8_t *virt, unsigned int size, int offset);
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/* Load final application firmware after bootloader */
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extern int softing_load_app_fw(const char *file, struct softing *card);
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/*
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* enable or disable irq
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* only called with fw.lock locked
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*/
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extern int softing_enable_irq(struct softing *card, int enable);
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/* start/stop 1 bus on card */
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extern int softing_startstop(struct net_device *netdev, int up);
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/* netif_rx() */
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extern int softing_netdev_rx(struct net_device *netdev,
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const struct can_frame *msg, ktime_t ktime);
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/* SOFTING DPRAM mappings */
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#define DPRAM_RX 0x0000
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#define DPRAM_RX_SIZE 32
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#define DPRAM_RX_CNT 16
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#define DPRAM_RX_RD 0x0201 /* uint8_t */
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#define DPRAM_RX_WR 0x0205 /* uint8_t */
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#define DPRAM_RX_LOST 0x0207 /* uint8_t */
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#define DPRAM_FCT_PARAM 0x0300 /* int16_t [20] */
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#define DPRAM_FCT_RESULT 0x0328 /* int16_t */
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#define DPRAM_FCT_HOST 0x032b /* uint16_t */
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#define DPRAM_INFO_BUSSTATE 0x0331 /* uint16_t */
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#define DPRAM_INFO_BUSSTATE2 0x0335 /* uint16_t */
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#define DPRAM_INFO_ERRSTATE 0x0339 /* uint16_t */
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#define DPRAM_INFO_ERRSTATE2 0x033d /* uint16_t */
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#define DPRAM_RESET 0x0341 /* uint16_t */
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#define DPRAM_CLR_RECV_FIFO 0x0345 /* uint16_t */
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#define DPRAM_RESET_TIME 0x034d /* uint16_t */
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#define DPRAM_TIME 0x0350 /* uint64_t */
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#define DPRAM_WR_START 0x0358 /* uint8_t */
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#define DPRAM_WR_END 0x0359 /* uint8_t */
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#define DPRAM_RESET_RX_FIFO 0x0361 /* uint16_t */
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#define DPRAM_RESET_TX_FIFO 0x0364 /* uint8_t */
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#define DPRAM_READ_FIFO_LEVEL 0x0365 /* uint8_t */
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#define DPRAM_RX_FIFO_LEVEL 0x0366 /* uint16_t */
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#define DPRAM_TX_FIFO_LEVEL 0x0366 /* uint16_t */
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#define DPRAM_TX 0x0400 /* uint16_t */
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#define DPRAM_TX_SIZE 16
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#define DPRAM_TX_CNT 32
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#define DPRAM_TX_RD 0x0601 /* uint8_t */
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#define DPRAM_TX_WR 0x0605 /* uint8_t */
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#define DPRAM_COMMAND 0x07e0 /* uint16_t */
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#define DPRAM_RECEIPT 0x07f0 /* uint16_t */
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#define DPRAM_IRQ_TOHOST 0x07fe /* uint8_t */
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#define DPRAM_IRQ_TOCARD 0x07ff /* uint8_t */
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#define DPRAM_V2_RESET 0x0e00 /* uint8_t */
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#define DPRAM_V2_IRQ_TOHOST 0x0e02 /* uint8_t */
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#define TXMAX (DPRAM_TX_CNT - 1)
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/* DPRAM return codes */
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#define RES_NONE 0
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#define RES_OK 1
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#define RES_NOK 2
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#define RES_UNKNOWN 3
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/* DPRAM flags */
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#define CMD_TX 0x01
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#define CMD_ACK 0x02
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#define CMD_XTD 0x04
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#define CMD_RTR 0x08
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#define CMD_ERR 0x10
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#define CMD_BUS2 0x80
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/* returned fifo entry bus state masks */
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#define SF_MASK_BUSOFF 0x80
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#define SF_MASK_EPASSIVE 0x60
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/* bus states */
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#define STATE_BUSOFF 2
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#define STATE_EPASSIVE 1
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#define STATE_EACTIVE 0
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