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spi: pxa2xx: Differentiate Intel LPSS types

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Intel LPSS SPI properties differ between between platforms. Now private
registers offset 0x400 or 0x800 is autodetected but there is need to
support also other offset and handle a few other differences.

Prepare for that by splitting the LPSS_SSP type into compatible hardware
types and set it now based on PCI or ACPI ID. That type will be used to set
properties that differ between current and upcoming platforms.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jarkko Nikula
2015-06-04 16:55:10 +03:00
committed by Mark Brown
parent b787f68c36
commit 03fbf488ce
3 changed files with 36 additions and 19 deletions
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8
drivers/spi/spi-pxa2xx-pci.c
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@@ -62,7 +62,7 @@ static struct pxa_spi_info spi_info_configs[] = {
.max_clk_rate = 3686400,
},
[PORT_BYT] = {
.type = LPSS_SSP,
.type = LPSS_BYT_SSP,
.port_id = 0,
.num_chipselect = 1,
.max_clk_rate = 50000000,
@@ -70,7 +70,7 @@ static struct pxa_spi_info spi_info_configs[] = {
.rx_param = &byt_rx_param,
},
[PORT_BSW0] = {
.type = LPSS_SSP,
.type = LPSS_BYT_SSP,
.port_id = 0,
.num_chipselect = 1,
.max_clk_rate = 50000000,
@@ -78,7 +78,7 @@ static struct pxa_spi_info spi_info_configs[] = {
.rx_param = &bsw0_rx_param,
},
[PORT_BSW1] = {
.type = LPSS_SSP,
.type = LPSS_BYT_SSP,
.port_id = 1,
.num_chipselect = 1,
.max_clk_rate = 50000000,
@@ -86,7 +86,7 @@ static struct pxa_spi_info spi_info_configs[] = {
.rx_param = &bsw1_rx_param,
},
[PORT_BSW2] = {
.type = LPSS_SSP,
.type = LPSS_BYT_SSP,
.port_id = 2,
.num_chipselect = 1,
.max_clk_rate = 50000000,