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net/mlx5: Fix PBMC register mapping

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[ Upstream commit 534b1204ca4694db1093b15cf3e79a99fcb6a6da ]

Add reserved mapping to cover all the register in order to avoid setting
arbitrary values to newer FW which implements the reserved fields.

Fixes: 50b4a3c236 ("net/mlx5: PPTB and PBMC register firmware command support")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Aya Levin
2021-04-04 12:55:00 +03:00
committed by Greg Kroah-Hartman
parent 1312f11eb3
commit 03ad6a2521
1 changed files with 1 additions and 1 deletions
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include/linux/mlx5/mlx5_ifc.h
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@@ -10058,7 +10058,7 @@ struct mlx5_ifc_pbmc_reg_bits {
struct mlx5_ifc_bufferx_reg_bits buffer[10];
u8 reserved_at_2e0[0x40];
u8 reserved_at_2e0[0x80];
};
struct mlx5_ifc_qtct_reg_bits {