arm64: Add helper for extracting ASIDBits
Add a helper to extract ASIDBits on the current cpu Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Catalin Marinas

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commit
038dc9c66a
@@ -40,6 +40,28 @@ static cpumask_t tlb_flush_pending;
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#define ASID_FIRST_VERSION (1UL << asid_bits)
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#define ASID_FIRST_VERSION (1UL << asid_bits)
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#define NUM_USER_ASIDS ASID_FIRST_VERSION
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#define NUM_USER_ASIDS ASID_FIRST_VERSION
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/* Get the ASIDBits supported by the current CPU */
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static u32 get_cpu_asid_bits(void)
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{
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u32 asid;
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int fld = cpuid_feature_extract_field(read_cpuid(SYS_ID_AA64MMFR0_EL1),
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ID_AA64MMFR0_ASID_SHIFT);
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switch (fld) {
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default:
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pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",
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smp_processor_id(), fld);
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/* Fallthrough */
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case 0:
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asid = 8;
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break;
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case 2:
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asid = 16;
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}
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return asid;
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}
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static void flush_context(unsigned int cpu)
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static void flush_context(unsigned int cpu)
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{
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{
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int i;
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int i;
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@@ -187,19 +209,7 @@ switch_mm_fastpath:
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static int asids_init(void)
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static int asids_init(void)
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{
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{
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int fld = cpuid_feature_extract_field(read_cpuid(SYS_ID_AA64MMFR0_EL1), 4);
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asid_bits = get_cpu_asid_bits();
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switch (fld) {
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default:
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pr_warn("Unknown ASID size (%d); assuming 8-bit\n", fld);
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/* Fallthrough */
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case 0:
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asid_bits = 8;
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break;
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case 2:
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asid_bits = 16;
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}
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/* If we end up with more CPUs than ASIDs, expect things to crash */
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/* If we end up with more CPUs than ASIDs, expect things to crash */
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WARN_ON(NUM_USER_ASIDS < num_possible_cpus());
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WARN_ON(NUM_USER_ASIDS < num_possible_cpus());
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atomic64_set(&asid_generation, ASID_FIRST_VERSION);
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atomic64_set(&asid_generation, ASID_FIRST_VERSION);
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