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Merge branch 'pci/misc' into next

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* pci/misc:
  PCI: Replace strict_strtoul() with kstrtoul()
  PCI: Fix comment typo for PCI_EXP_LNKCAP_CLKPM
  PCI: Replace printks with appropriate pr_*()
  PCI: Fix kerneldoc for pci_disable_link_state()
  x86/PCI: Increase info->res_num before checking pci_use_crs
  PCI: Fix INTC comment typo for pci_swizzle_interrupt_pin()
  PCI: Convert ioapic.c to module_pci_driver
This commit is contained in:
Bjorn Helgaas
2013-06-01 17:50:39 -06:00
parent b194dbf5ee 9a994e8ec7
commit 0345d3f8b2
7 changed files with 25 additions and 34 deletions
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7
arch/x86/pci/acpi.c
View File

@@ -324,14 +324,11 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
res->start = start; res->start = start;
res->end = end; res->end = end;
info->res_offset[info->res_num] = addr.translation_offset; info->res_offset[info->res_num] = addr.translation_offset;
info->res_num++;
if (!pci_use_crs) { if (!pci_use_crs)
dev_printk(KERN_DEBUG, &info->bridge->dev, dev_printk(KERN_DEBUG, &info->bridge->dev,
"host bridge window %pR (ignored)\n", res); "host bridge window %pR (ignored)\n", res);
return AE_OK;
}
info->res_num++;
return AE_OK; return AE_OK;
} }

13
drivers/pci/ioapic.c
View File

@@ -113,17 +113,6 @@ static struct pci_driver ioapic_driver = {
.remove = ioapic_remove, .remove = ioapic_remove,
}; };
static int __init ioapic_init(void) module_pci_driver(ioapic_driver);
{
return pci_register_driver(&ioapic_driver);
}
static void __exit ioapic_exit(void)
{
pci_unregister_driver(&ioapic_driver);
}
module_init(ioapic_init);
module_exit(ioapic_exit);
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");

4
drivers/pci/pci-acpi.c
View File

@@ -376,12 +376,12 @@ static int __init acpi_pci_init(void)
int ret; int ret;
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) { if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) {
printk(KERN_INFO"ACPI FADT declares the system doesn't support MSI, so disable it\n"); pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n");
pci_no_msi(); pci_no_msi();
} }
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
printk(KERN_INFO"ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n"); pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
pcie_no_aspm(); pcie_no_aspm();
} }

18
drivers/pci/pci-sysfs.c
View File

@@ -66,7 +66,7 @@ static ssize_t broken_parity_status_store(struct device *dev,
struct pci_dev *pdev = to_pci_dev(dev); struct pci_dev *pdev = to_pci_dev(dev);
unsigned long val; unsigned long val;
if (strict_strtoul(buf, 0, &val) < 0) if (kstrtoul(buf, 0, &val) < 0)
return -EINVAL; return -EINVAL;
pdev->broken_parity_status = !!val; pdev->broken_parity_status = !!val;
@@ -188,7 +188,7 @@ static ssize_t is_enabled_store(struct device *dev,
{ {
struct pci_dev *pdev = to_pci_dev(dev); struct pci_dev *pdev = to_pci_dev(dev);
unsigned long val; unsigned long val;
ssize_t result = strict_strtoul(buf, 0, &val); ssize_t result = kstrtoul(buf, 0, &val);
if (result < 0) if (result < 0)
return result; return result;
@@ -259,7 +259,7 @@ msi_bus_store(struct device *dev, struct device_attribute *attr,
struct pci_dev *pdev = to_pci_dev(dev); struct pci_dev *pdev = to_pci_dev(dev);
unsigned long val; unsigned long val;
if (strict_strtoul(buf, 0, &val) < 0) if (kstrtoul(buf, 0, &val) < 0)
return -EINVAL; return -EINVAL;
/* bad things may happen if the no_msi flag is changed /* bad things may happen if the no_msi flag is changed
@@ -291,7 +291,7 @@ static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
unsigned long val; unsigned long val;
struct pci_bus *b = NULL; struct pci_bus *b = NULL;
if (strict_strtoul(buf, 0, &val) < 0) if (kstrtoul(buf, 0, &val) < 0)
return -EINVAL; return -EINVAL;
if (val) { if (val) {
@@ -315,7 +315,7 @@ dev_rescan_store(struct device *dev, struct device_attribute *attr,
unsigned long val; unsigned long val;
struct pci_dev *pdev = to_pci_dev(dev); struct pci_dev *pdev = to_pci_dev(dev);
if (strict_strtoul(buf, 0, &val) < 0) if (kstrtoul(buf, 0, &val) < 0)
return -EINVAL; return -EINVAL;
if (val) { if (val) {
@@ -342,7 +342,7 @@ remove_store(struct device *dev, struct device_attribute *dummy,
int ret = 0; int ret = 0;
unsigned long val; unsigned long val;
if (strict_strtoul(buf, 0, &val) < 0) if (kstrtoul(buf, 0, &val) < 0)
return -EINVAL; return -EINVAL;
/* An attribute cannot be unregistered by one of its own methods, /* An attribute cannot be unregistered by one of its own methods,
@@ -362,7 +362,7 @@ dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
unsigned long val; unsigned long val;
struct pci_bus *bus = to_pci_bus(dev); struct pci_bus *bus = to_pci_bus(dev);
if (strict_strtoul(buf, 0, &val) < 0) if (kstrtoul(buf, 0, &val) < 0)
return -EINVAL; return -EINVAL;
if (val) { if (val) {
@@ -384,7 +384,7 @@ static ssize_t d3cold_allowed_store(struct device *dev,
struct pci_dev *pdev = to_pci_dev(dev); struct pci_dev *pdev = to_pci_dev(dev);
unsigned long val; unsigned long val;
if (strict_strtoul(buf, 0, &val) < 0) if (kstrtoul(buf, 0, &val) < 0)
return -EINVAL; return -EINVAL;
pdev->d3cold_allowed = !!val; pdev->d3cold_allowed = !!val;
@@ -1236,7 +1236,7 @@ static ssize_t reset_store(struct device *dev,
{ {
struct pci_dev *pdev = to_pci_dev(dev); struct pci_dev *pdev = to_pci_dev(dev);
unsigned long val; unsigned long val;
ssize_t result = strict_strtoul(buf, 0, &val); ssize_t result = kstrtoul(buf, 0, &val);
if (result < 0) if (result < 0)
return result; return result;

2
drivers/pci/pci.c
View File

@@ -2421,7 +2421,7 @@ bool pci_acs_path_enabled(struct pci_dev *start,
/** /**
* pci_swizzle_interrupt_pin - swizzle INTx for device behind bridge * pci_swizzle_interrupt_pin - swizzle INTx for device behind bridge
* @dev: the PCI device * @dev: the PCI device
* @pin: the INTx pin (1=INTA, 2=INTB, 3=INTD, 4=INTD) * @pin: the INTx pin (1=INTA, 2=INTB, 3=INTC, 4=INTD)
* *
* Perform INTx swizzling for a device behind one level of bridge. This is * Perform INTx swizzling for a device behind one level of bridge. This is
* required by section 9.1 of the PCI-to-PCI bridge specification for devices * required by section 9.1 of the PCI-to-PCI bridge specification for devices

13
drivers/pci/pcie/aspm.c
View File

@@ -714,10 +714,6 @@ void pcie_aspm_powersave_config_link(struct pci_dev *pdev)
up_read(&pci_bus_sem); up_read(&pci_bus_sem);
} }
/*
* pci_disable_link_state - disable pci device's link state, so the link will
* never enter specific states
*/
static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem, static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem,
bool force) bool force)
{ {
@@ -771,6 +767,15 @@ void pci_disable_link_state_locked(struct pci_dev *pdev, int state)
} }
EXPORT_SYMBOL(pci_disable_link_state_locked); EXPORT_SYMBOL(pci_disable_link_state_locked);
/**
* pci_disable_link_state - Disable device's link state, so the link will
* never enter specific states. Note that if the BIOS didn't grant ASPM
* control to the OS, this does nothing because we can't touch the LNKCTL
* register.
*
* @pdev: PCI device
* @state: ASPM link state to disable
*/
void pci_disable_link_state(struct pci_dev *pdev, int state) void pci_disable_link_state(struct pci_dev *pdev, int state)
{ {
__pci_disable_link_state(pdev, state, true, false); __pci_disable_link_state(pdev, state, true, false);

2
include/uapi/linux/pci_regs.h
View File

@@ -468,7 +468,7 @@
#define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */ #define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */
#define PCI_EXP_LNKCAP_L0SEL 0x00007000 /* L0s Exit Latency */ #define PCI_EXP_LNKCAP_L0SEL 0x00007000 /* L0s Exit Latency */
#define PCI_EXP_LNKCAP_L1EL 0x00038000 /* L1 Exit Latency */ #define PCI_EXP_LNKCAP_L1EL 0x00038000 /* L1 Exit Latency */
#define PCI_EXP_LNKCAP_CLKPM 0x00040000 /* L1 Clock Power Management */ #define PCI_EXP_LNKCAP_CLKPM 0x00040000 /* Clock Power Management */
#define PCI_EXP_LNKCAP_SDERC 0x00080000 /* Surprise Down Error Reporting Capable */ #define PCI_EXP_LNKCAP_SDERC 0x00080000 /* Surprise Down Error Reporting Capable */
#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ #define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
#define PCI_EXP_LNKCAP_LBNC 0x00200000 /* Link Bandwidth Notification Capability */ #define PCI_EXP_LNKCAP_LBNC 0x00200000 /* Link Bandwidth Notification Capability */