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clocksource/drivers/timer-riscv: Use per-CPU timer interrupt

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Instead of directly calling RISC-V timer interrupt handler from
RISC-V local interrupt conntroller driver, this patch implements
RISC-V timer interrupt as a per-CPU interrupt using per-CPU APIs
of Linux IRQ subsystem.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
This commit is contained in:
Anup Patel
2020-06-01 14:45:41 +05:30
committed by Palmer Dabbelt
parent 6b7ce8927b
commit 033a65de7e
3 changed files with 40 additions and 13 deletions
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8
drivers/irqchip/irq-riscv-intc.c
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@@ -21,20 +21,12 @@ static struct irq_domain *intc_domain;
static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
{
struct pt_regs *old_regs;
unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;
if (unlikely(cause >= BITS_PER_LONG))
panic("unexpected interrupt cause");
switch (cause) {
case RV_IRQ_TIMER:
old_regs = set_irq_regs(regs);
irq_enter();
riscv_timer_interrupt();
irq_exit();
set_irq_regs(old_regs);
break;
#ifdef CONFIG_SMP
case RV_IRQ_SOFT:
/*