Cleanup the mess in cpu_cache_init.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
2005-10-01 13:06:32 +01:00
parent 942d042d17
commit 02cf211968
12 changed files with 101 additions and 87 deletions

View File

@@ -104,58 +104,48 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address,
}
}
extern void ld_mmu_r23000(void);
extern void ld_mmu_r4xx0(void);
extern void ld_mmu_tx39(void);
extern void ld_mmu_r6000(void);
extern void ld_mmu_tfp(void);
extern void ld_mmu_andes(void);
extern void ld_mmu_sb1(void);
#define __weak __attribute__((weak))
static char cache_panic[] __initdata = "Yeee, unsupported cache architecture.";
void __init cpu_cache_init(void)
{
if (cpu_has_4ktlb) {
#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \
defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \
defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432) || \
defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32_R1) || \
defined(CONFIG_CPU_MIPS64_R1) || defined(CONFIG_CPU_TX49XX) || \
defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000)
ld_mmu_r4xx0();
#endif
} else switch (current_cpu_data.cputype) {
#ifdef CONFIG_CPU_R3000
case CPU_R2000:
case CPU_R3000:
case CPU_R3000A:
case CPU_R3081E:
ld_mmu_r23000();
break;
#endif
#ifdef CONFIG_CPU_TX39XX
case CPU_TX3912:
case CPU_TX3922:
case CPU_TX3927:
ld_mmu_tx39();
break;
#endif
#ifdef CONFIG_CPU_R10000
case CPU_R10000:
case CPU_R12000:
ld_mmu_r4xx0();
break;
#endif
#ifdef CONFIG_CPU_SB1
case CPU_SB1:
ld_mmu_sb1();
break;
#endif
if (cpu_has_3k_cache) {
extern void __weak r3k_cache_init(void);
case CPU_R8000:
panic("R8000 is unsupported");
break;
default:
panic("Yeee, unsupported cache architecture.");
r3k_cache_init();
return;
}
if (cpu_has_6k_cache) {
extern void __weak r6k_cache_init(void);
r6k_cache_init();
return;
}
if (cpu_has_4k_cache) {
extern void __weak r4k_cache_init(void);
r4k_cache_init();
return;
}
if (cpu_has_8k_cache) {
extern void __weak r8k_cache_init(void);
r8k_cache_init();
return;
}
if (cpu_has_tx39_cache) {
extern void __weak tx39_cache_init(void);
tx39_cache_init();
return;
}
if (cpu_has_sb1_cache) {
extern void __weak sb1_cache_init(void);
sb1_cache_init();
return;
}
panic(cache_panic);
}