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drm/radeon: implement pci config reset for CIK (v3)

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pci config reset is a low level reset that resets
the entire chip from the bus interface.  It can
be more reliable if soft reset fails.

v2: fix rebase
v3: hide behind module parameter

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
2013-10-02 15:18:14 -04:00
parent 4a5c8ea59f
commit 0279ed19bd
2 changed files with 172 additions and 0 deletions
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11
drivers/gpu/drm/radeon/cikd.h
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@@ -724,6 +724,17 @@
#define ATC_MISC_CG 0x3350
#define GMCON_RENG_EXECUTE 0x3508
#define RENG_EXECUTE_ON_PWR_UP (1 << 0)
#define GMCON_MISC 0x350c
#define RENG_EXECUTE_ON_REG_UPDATE (1 << 11)
#define STCTRL_STUTTER_EN (1 << 16)
#define GMCON_PGFSM_CONFIG 0x3538
#define GMCON_PGFSM_WRITE 0x353c
#define GMCON_PGFSM_READ 0x3540
#define GMCON_MISC3 0x3544
#define MC_SEQ_CNTL_3 0x3600
# define CAC_EN (1 << 31)
#define MC_SEQ_G5PDX_CTRL 0x3604