dmaengine: shdma: convert to platform device resources
The shdma dmaengine driver currently uses numerous macros to support various platforms, selected by ifdef's. Convert it to use platform device resources and lists of channel descriptors to specify register locations, interrupt numbers and other system-specific configuration variants. Unavoidably, we have to simultaneously convert all shdma users to provide those resources. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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committed by
Paul Mundt

orang tua
47a4dc26ee
melakukan
027811b9b8
@@ -295,15 +295,115 @@ static struct platform_device tmu5_device = {
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.num_resources = ARRAY_SIZE(tmu5_resources),
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};
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static struct sh_dmae_pdata dma_platform_data = {
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.mode = (SHDMA_MIX_IRQ | SHDMA_DMAOR1),
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/* DMA */
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static struct sh_dmae_channel sh7785_dmae0_channels[] = {
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{
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.offset = 0,
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.dmars = 0,
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.dmars_bit = 0,
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}, {
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.offset = 0x10,
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.dmars = 0,
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.dmars_bit = 8,
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}, {
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.offset = 0x20,
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.dmars = 4,
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.dmars_bit = 0,
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}, {
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.offset = 0x30,
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.dmars = 4,
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.dmars_bit = 8,
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}, {
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.offset = 0x50,
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.dmars = 8,
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.dmars_bit = 0,
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}, {
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.offset = 0x60,
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.dmars = 8,
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.dmars_bit = 8,
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}
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};
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static struct platform_device dma_device = {
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static struct sh_dmae_channel sh7785_dmae1_channels[] = {
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{
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.offset = 0,
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}, {
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.offset = 0x10,
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}, {
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.offset = 0x20,
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}, {
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.offset = 0x30,
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}, {
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.offset = 0x50,
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}, {
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.offset = 0x60,
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}
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};
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static struct sh_dmae_pdata dma0_platform_data = {
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.channel = sh7785_dmae0_channels,
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.channel_num = ARRAY_SIZE(sh7785_dmae0_channels),
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};
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static struct sh_dmae_pdata dma1_platform_data = {
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.channel = sh7785_dmae1_channels,
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.channel_num = ARRAY_SIZE(sh7785_dmae1_channels),
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};
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static struct resource sh7785_dmae0_resources[] = {
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[0] = {
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/* Channel registers and DMAOR */
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.start = 0xfc808020,
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.end = 0xfc80808f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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/* DMARSx */
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.start = 0xfc809000,
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.end = 0xfc80900b,
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.flags = IORESOURCE_MEM,
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},
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{
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/* Real DMA error IRQ is 39, and channel IRQs are 33-38 */
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.start = 33,
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.end = 33,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
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},
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};
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static struct resource sh7785_dmae1_resources[] = {
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[0] = {
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/* Channel registers and DMAOR */
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.start = 0xfcc08020,
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.end = 0xfcc0808f,
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.flags = IORESOURCE_MEM,
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},
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/* DMAC1 has no DMARS */
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{
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/* Real DMA error IRQ is 58, and channel IRQs are 52-57 */
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.start = 52,
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.end = 52,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
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},
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};
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static struct platform_device dma0_device = {
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.name = "sh-dma-engine",
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.id = -1,
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.id = 0,
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.resource = sh7785_dmae0_resources,
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.num_resources = ARRAY_SIZE(sh7785_dmae0_resources),
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.dev = {
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.platform_data = &dma_platform_data,
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.platform_data = &dma0_platform_data,
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},
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};
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static struct platform_device dma1_device = {
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.name = "sh-dma-engine",
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.id = 1,
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.resource = sh7785_dmae1_resources,
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.num_resources = ARRAY_SIZE(sh7785_dmae1_resources),
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.dev = {
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.platform_data = &dma1_platform_data,
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},
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};
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@@ -320,7 +420,8 @@ static struct platform_device *sh7785_devices[] __initdata = {
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&tmu3_device,
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&tmu4_device,
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&tmu5_device,
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&dma_device,
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&dma0_device,
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&dma1_device,
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};
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static int __init sh7785_devices_setup(void)
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